We study in this paper the problem of minimizing channel density by simultaneously shifting the blocks that form the two sides of a channel and the terminals on the boundary of each block. Several special cases of this problem have been investigated, but no optimal algorithm was known for the general case. We present an optimal algorithm for solving this problem. For long channels, we also propose effective heuristic techniques to speed up our algorithm. Extensions as well as applications of our algorithms to detailed routing in building-block layout design are also discussed.>

Given a building-block layout of rectangular modules, the routing area is to be decomposed into straight and L-shaped channels and routed in a certain order. Since straight channels are easier to route and channel routers usually produce near-optimal results, it is desirable to minimize the number of L-shaped channels used in such a decomposition. An algorithm for minimizing the number of L-shaped channels used in the routing area decomposition is presented. The algorithm is based on a careful study of the structure of layouts of rectangular modules and a transformation of the original problem to a graph theoretical problem. For examples of up to 136 channels, the algorithm took less than one tenth of a second on a SUN SPARC station 1 to finish the computation and obtained up to 29% reduction in the mumber of L-shaped channels over the results produced by the algorithm of W.M. Dai et al. (1985).>

Considers in this paper the problem of shifting vias to obtain more compactable channel routing solutions. Let S be a grid-based two-layer channel routing solution. Let v/sub c/, w/sub c/ be the number of grid points on column c that are occupied by vias, horizontal wires in S, respectively. The authors define the expected height of columns c in S to be h/sub c/=Av/sub c/+Bw/sub c/+C, where A, B, C are some design rule dependent constants. A column in S is said to be a critical column if it has maximum expected height among all columns in S. Let H/sub S/=max/sub c/h/sub c/ be the expected height of the critical column(s) of S. H/sub S/ is an estimation of the height of S after compaction. The authors show that the problem of shifting vias to minimize H/sub S/ can be solved optimally in polynomial time.>

A linear-time optimal algorithm for minimizing the density of a channel (with exits) by permuting the terminals on the two sides of the channel is presented. It compares favorably with the near-optimal algorithm of J. Cong and K.-Y. Khoo (1991) that runs in superlinear time. The present algorithm has important applications in hierarchical layout design of integrated circuits. In addition, it is shown that the problem of minimizing wire length by permuting terminals is NP-hard in the strong sense.>

Article Free Access Share on On minimizing the number of L-shaped channels Authors: Yang Cai Department of Computer Sciences, University of Texas at Austin, Austin, Texas Department of Computer Sciences, University of Texas at Austin, Austin, TexasView Profile , D. F. Wong Department of Computer Sciences, University of Texas at Austin, Austin, Texas Department of Computer Sciences, University of Texas at Austin, Austin, TexasView Profile Authors Info & Claims DAC '91: Proceedings of the 28th ACM/IEEE Design Automation ConferenceJune 1991 Pages 328–334https://doi.org/10.1145/127601.127689Published:01 June 1991Publication History 2citation118DownloadsMetricsTotal Citations2Total Downloads118Last 12 Months2Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF

The authors study the problem of minimizing channel density by shifting the blocks that form the sides of the channel and the terminals on the boundary of each block. Several special cases of this problem have been investigated, but no polynomial time algorithm was known for the general case. The authors present a polynomial time optimal algorithm for solving this problem. For long channels, they propose heuristic approaches to speed up the algorithm. Extensions as well as applications of the algorithm to detailed routing in building-block layout design are also discussed. Preliminary experimental results are very promising. Substantial reductions in routing area were obtained in moderate computation time.>

The authors study the channel pin assignment (CPA) problem subject to position constraints, order constraints, and separation constraints. The problem is to assign two sets of terminals to the top and the bottom of a channel to minimize channel density. It is shown that the problem is NP-hard in general and polynomial time-optimal algorithms are presented for a case where the relative orderings of the terminals on the top and the bottom of the channel are completely fixed. The problem of channel routing with movable modules is introduced, and it is shown that it is a special case of the CPA problem under the formulation, and can be solved optimally in polynomial time. How the algorithms can be incorporated into standard-cell and building-block layout systems is discussed. Experimental results indicate that substantial reduction in channel density can be obtained by allowing movable terminals.>

A study is made of the problem of routing region definition and ordering in VLSI building-block layout design. An algorithm to decompose the routing area into straight channels and rectangular switchboxes corresponding to line segments in the routing structure of the placement such that the number of switchboxes is minimized, is presented. The algorithm is based on a graph-theory approach that makes use of an efficient polynomial time algorithm for computing minimum clique covers of triangulated graphs. Experimental results indicate that the algorithm performs well. For all the test problems considered, the algorithm consistently outperformed a previous known greedy algorithm, and it produced optimal solutions in all but one case.>

In this paper we study the problem of routing region definition in the VLSI building-block layout design style. We present an algorithm to decompose the routing area into a set of straight channels and switchboxes such that the number of switchboxes in the decomposition is minimized. Our algorithm is based on a graph-theoretic approach that makes use of an efficient polynomial time optimal algorithm for computing minimum clique covers of triangulated graphs. Experimental results indicate our algorithm performs well. We compared our algorithm with a previously known greedy approach and an exhaustive search optimal algorithm. For all the test problems we considered, our algorithm consistently outperformed the greedy algorithm, and it produced optimal solutions in almost all cases.

A study is made of the channel pin assignment problem subject to both position and order constraints. The authors show that the problem is NP-hard in general and present a polynomial time optimal algorithm for an important case where the relative orderings of the terminals are completely fixed. They extend their algorithm to solve the problem for the case where there are also separation constraints between some pairs of consecutive terminals optimally in polynomial time. A discussion is presented of how the algorithm can be incorporated into standard cell and building-block layout design systems. Experimental results indicate that by allowing movable terminals, substantial reductions in channel density can be obtained.>