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Roland Rühl

dblp:14/6953 · DBLP profile ↗
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8ranked-venue papers
2as first author
0since 2021 · last 1996
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 8 · 2 first-authorSoftware engineering, systems software and programming languages · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Performance modeling and evaluation · 28% Memory systems · 28% Parallel and multicore computing · 24%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 50% Operating systems · 50%

Topics — the 13 heaviest of 13, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing › multiprocessor system
distributed memory parallel processors
0.021991
The K2 distributed memory parallel processor: architecture, compiler, and operating system · SC 1991
Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors · ISCA 1989
Operating systems › multiprocessing
multiprocessor operating system
0.011991
The K2 distributed memory parallel processor: architecture, compiler, and operating system · SC 1991
Compilers and program optimization
parallelizing compiler
0.011991
The K2 distributed memory parallel processor: architecture, compiler, and operating system · SC 1991
Performance modeling and evaluation
benchmarking
0.011989
Performance Measurements on a Commercial Multiprocessor Running Parallel Code · ISCA 1989
Memory systems
cache
0.011989
Performance Measurements on a Commercial Multiprocessor Running Parallel Code · ISCA 1989
Memory systems › cache management › storage caching › caching policy
cache write policy
0.011989
Performance Measurements on a Commercial Multiprocessor Running Parallel Code · ISCA 1989
Performance modeling and evaluation › network performance analysis
interconnection network performance
0.011989
Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors · ISCA 1989
Parallel and multicore computing › multiprocessor system
multiprocessor performance measurement
0.011989
Performance Measurements on a Commercial Multiprocessor Running Parallel Code · ISCA 1989
Interconnection networks and networks-on-chip
network topology
0.011989
Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors · ISCA 1989
Performance modeling and evaluation › simulation
simulation-based evaluation
0.011989
Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors · ISCA 1989
Interconnection networks and networks-on-chip › network topology
torus network
0.011989
Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors · ISCA 1989
Memory systems › cache management › storage caching
write-back caching
0.011989
Performance Measurements on a Commercial Multiprocessor Running Parallel Code · ISCA 1989
Processor architecture and microarchitecture › multiprocessor architecture
symmetric multiprocessor
0.011989
Performance Measurements on a Commercial Multiprocessor Running Parallel Code · ISCA 1989

Methods — techniques the papers use, named apart from their topics

simulation · 0.0measurement · 0.0
YearPublicationVenuePosition
1996 Matching user requirements in parallel programming
Karsten M. Decker, Jiri J. Dvorak, René M. Rehmann, Roland Rühl
Future Gener. Comput. Syst.4
1995 An Implementation of Race Detection and Deterministic Replay with MPI
Christian Clémençon, Josef Fritscher, Michael J. Meehan, Roland Rühl
Euro-Par4
1995 Extending High Performance Fortran for the Support of Unstructured Computations
abstract
We have extended an existing HPF compiler with language features designed for the parallelization of unstructured computations on multicomputers.The language extensions include block-general distributions and dynamic data distributions specified through userdefined mapping arrays and finctions.A prototype compiler has been implemented which features dlfherent run-time preprocessing mechanisms and also allows clean integration of explicit messagepassing primitives.The compiler is developed as part of a complete multicomputer programming environment being used by a group of application developers in the framework of the Joint CSCS-ETH/NEC Collaboration in Parallel Processing.As such, it is supported by a high-level debugger andpe~oimance monitoc and the usability and efficiency of generated parallel programs is validated by the application developers.In this pape~we summarize the programming paradigm implemented through HPF extensions, and detail the respective compiler directives.We describe the implemented run-time preprocessing mechanisms and evaluate the efjlciency of compiler-generated code on an NEC Cenju-3 multicomputez
Roland Rühl
International Conference on Supercomputing2
1992 Evaluation of compiler generated parallel programs on three multicomputers
abstract
Distributed memory parallel processors (DMPPs) have no hardware support for a global address space. However, conventional programs written in a sequential imperative language such as Fortran typically manipulate few, large arrays. The Oxygen compiler, developed as part of the K2 project, translates conventional Fortran code, augmented with code and data distribution directives, into C programs including SEND/RECEIVE communication primitives. The compiler directives, which are either supplied by the user, or for simple programs generated automatically, support a global name space through a run-time mechanism called data consistency analysis. We report in this paper the performance of seven parallel programs generated by Oxygen for three DMPPs, namely for a Parsytec Supercluster, an iWARP, and for the Fujitsu AP1000. All machines were configured as 8 x 8 tori.
Roland Rühl
ICS1
1991 The K2 distributed memory parallel processor: architecture, compiler, and operating system
Marco Annaratone, Marco Fillo, M. Halbherr, Roland Rühl, P. Steiner, Marc A. Viredaz
SC4
1990 Parallelization of FORTRAN code on distributed-memory parallel processors
abstract
This paper presents some preliminary results toward the automatic parallelization of uniprocessor FORTRAN code on distributed-memory parallel processors (DMPPs). The paper introduces Oxygen, a compiler for a DMPP under development at the Laboratory. The design of Oxygen and its parallelization strategy are discussed, and an analysis of its most significant components is presented, together with performance benchmarks. Oxygen carries out data consistency analysis at run-time; our results show that the overhead introduced is acceptable. Run-time data consistency analysis may also be the only viable approach to parallelize certain “hard” algorithms, as we will show in this study.
Roland Rühl, Marco Annaratone
ICS1
1989 Interprocessor Communication Speed and Performance in Distributed-memory Parallel Processors
abstract
We have simulated several numerical and non-numerical algorithms on five distributed-memory parallel processors (DMPPs). All five DMPPs have the same topology (a torus), and the same number of nodes. The architectures differ only in the communication speed between neighboring nodes, while the computation unit is kept unchanged. The goal of the paper is to quantify the effect that interprocessor communication speed and synchronization overhead have on the performance of the DMPPs. After introducing the rationale for this study and reviewing related work, we present and discuss the results of the simulations.
Marco Annaratone, Claude Pommerell, Roland Rühl
ISCA3
1989 Performance Measurements on a Commercial Multiprocessor Running Parallel Code
abstract
The multiprocessor Sequent Symmetry was first delivered to customers with write-through caches. Later on each machine was upgraded with copy-back caches. Because all the other architectural parameters were unchanged (main memory, bus, cache organization and size, and so on), this made it possible to measure the performance of a multiprocessor with no caches, write-through caches, and copy-back caches. We also study the impact that the language (FORTRAN and C) has on the performance of the machine.
Marco Annaratone, Roland Rühl
ISCA2