In this paper we examine a number of concepts and issues concerning variable rate coding of speech. We formulate the problem as a multistate coder (i.e. a coder that can operate at several bit rates) coupled with a time buffer. We first analyze the theoretical aspects of the problem by examining it in the context of a block processing formulation. We also allude to a multiple user configuration of variable rate coding for TASI type applications. A practical example of a variable rate ADPCM coder is presented and applied to speech coding. It is shown that by careful design the algorithm can be made to be as robust to channel errors as that of a fixed rate ADPCM coder.

A microprocessor has been used to translate between Log PCM and ADPCM (Adaptive Differential PCM) code forms. This system, in bridging the gap between simulation and prototyping, provides realtime speech processing with user interaction. Continuously coded speech can he subjectively evaluated while switching the values of code word length, step size, or predictor coefficients. Translations of additional code forms such as Δ-Mod, NIC, or Tree Codes could easily be implemented with the micro-codable system. The processor is configured as a stand-alone device competitive with special purpose hardware in size, speed, and cost.

When speech is coded using a differential pulse-code modulation system with an adaptive quantizer, the digital code words exhibit considerable variation among all quantization levels during both voiced and unvoiced speech intervals. However, because of limits on the range of step sizes, during silent intervals the code words vary only slightly among the smallest quantization steps. Based on this principle, a simple algorithm for locating the beginning and end of a speech utterance has been developed. This algorithm has been tested in computer simulations and has been constructed with standard integrated circuit technology.