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Yudong Wu

dblp:141/4725 · DBLP profile ↗
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12ranked-venue papers
2as first author
5since 2021 · last 2026
0009-0005-2615-140XORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 6 · 1 first-author · 3 since 2021Graphics, computer vision, multimedia, augmented reality and games · 5 · 1 first-author · 2 since 2021Systems, architecture and hardware · 3 · 1 first-authorSecurity and privacy · 2 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Artificial intelligence
3 papers
Face, body and person analysis · 38% Deep learning architectures and training · 31% Efficient and distributed learning · 31%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
GPUs and heterogeneous computing · 32% Electronic design automation · 32% Parallel and multicore computing · 18%
Network and information security
2 papers
Authentication and access control · 100%

Topics — the 11 heaviest of 15, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Computer vision › Face, body and person analysis
face recognition
0.922021
DAM: Discrepancy Alignment Metric for Face Recognition · ICCV 2021
Rotation Consistent Margin Loss for Efficient Low-Bit Face Recognition · CVPR 2020
GPUs and heterogeneous computing
GPU architecture
0.522018
CRAT: Enabling Coordinated Register Allocation and Thread-Level Parallelism Optimization for GPUs · IEEE Trans. Computers 2018
Enabling coordinated register allocation and thread-level parallelism optimization for GPUs · MICRO 2015
Electronic design automation › high-level synthesis › resource binding
register allocation
0.522018
CRAT: Enabling Coordinated Register Allocation and Thread-Level Parallelism Optimization for GPUs · IEEE Trans. Computers 2018
Enabling coordinated register allocation and thread-level parallelism optimization for GPUs · MICRO 2015
Machine learning › Efficient and distributed learning
model compression
0.412020
Rotation Consistent Margin Loss for Efficient Low-Bit Face Recognition · CVPR 2020
Machine learning › Efficient and distributed learning › model compression › quantization
quantized neural network
0.412020
Rotation Consistent Margin Loss for Efficient Low-Bit Face Recognition · CVPR 2020
Machine learning › Deep learning architectures and training › data-centric deep learning
sample weighting
0.412020
Learning to Auto Weight: Entirely Data-Driven and Highly Efficient Weighting Framework · AAAI 2020
Parallel and multicore computing › parallel programming runtimes › thread management
thread throttling
0.322018
Enabling coordinated register allocation and thread-level parallelism optimization for GPUs · MICRO 2015
CRAT: Enabling Coordinated Register Allocation and Thread-Level Parallelism Optimization for GPUs · IEEE Trans. Computers 2018
Memory systems › cache management
cache contention mitigation
0.212015
Enabling coordinated register allocation and thread-level parallelism optimization for GPUs · MICRO 2015
Computer vision › Face, body and person analysis › face recognition
open-set face recognition
0.112020
Rotation Consistent Margin Loss for Efficient Low-Bit Face Recognition · CVPR 2020
Network management and operations › network configuration
security configuration
0.112019
Towards Continuous Access Control Validation and Forensics · CCS 2019
Processor architecture and microarchitecture
multicore design
0.112018
CRAT: Enabling Coordinated Register Allocation and Thread-Level Parallelism Optimization for GPUs · IEEE Trans. Computers 2018

Methods — techniques the papers use, named apart from their topics

time-changing decision tree · 0.8log-based policy inference · 0.8local inter-class discrepancy estimation · 0.5discrepancy alignment metric · 0.5reinforcement-learning-style policy search · 0.4margin loss · 0.4bi-level optimization · 0.4angular space disentanglement · 0.4dynamic register allocation · 0.3compile-time register allocation · 0.3thread throttling · 0.2coordinated register allocation · 0.2
YearPublicationVenuePosition
2026 Deep lightweight face forgery detection network using multi-scale global features and adaptive weighted channel self-attention
Yonghang Fu, Yudong Wu, Fengyong Li
Multim. Tools Appl.3
2024 Unlocking authentic judicial reasoning: A Template-Based Legal Information Generation framework for judicial views
Yudong Wu, Ang Li 0049, Yiquan Wu 0001, Kun Kuang 0001
Knowl. Based Syst.2
2021 DAM: Discrepancy Alignment Metric for Face Recognition
abstract
The field of face recognition (FR) has witnessed remarkable progress with the surge of deep learning. The effective loss functions play an important role for FR. In this paper, we observe that a majority of loss functions, including the widespread triplet loss and softmax-based cross-entropy loss, embed inter-class (negative) similarity snand intra-class (positive) similarity spinto similarity pairs and optimize to reduce (sn− sp) in the training process. However, in the verification process, existing metrics directly take the absolute similarity between two features as the confidence of belonging to the same identity, which inevitably causes a gap between the training and verification process. To bridge the gap, we propose a new metric called Discrepancy Alignment Metric (DAM) for verification, which introduces the Local Inter-class Discrepancy (LID) for each face image to normalize the absolute similarity score. To estimate the LID of each face image in the verification process, we propose two types of LID Estimation (LIDE) methods, which are reference-based and learning-based estimation methods, respectively. The proposed DAM is plug-and-play and can be easily applied to the most existing methods. Extensive experiments on multiple popular face recognition benchmark datasets demonstrate the effectiveness of our proposed method.
Yudong Wu, Yichao Wu, Chuming Li, Xiaolin Hu 0001, Ding Liang
ICCV2
2021 Can Systems Explain Permissions Better? Understanding Users' Misperceptions under Smartphone Runtime Permission Model
Bingyu Shen 0002, Chengcheng Xiang, Yudong Wu, Mingyao Shen, Yuanyuan Zhou 0001, Xinxin Jin
USENIX Security Symposium4
2021 Consistent scale normalization for object perception
Zewen He, Yudong Wu, Xuebing Yang, Wensheng Zhang 0002
Appl. Intell.3
2020 Learning to Auto Weight: Entirely Data-Driven and Highly Efficient Weighting Framework
abstract
Example weighting algorithm is an effective solution to the training bias problem, however, most previous typical methods are usually limited to human knowledge and require laborious tuning of hyperparameters. In this paper, we propose a novel example weighting framework called Learning to Auto Weight (LAW). The proposed framework finds step-dependent weighting policies adaptively, and can be jointly trained with target networks without any assumptions or prior knowledge about the dataset. It consists of three key components: Stage-based Searching Strategy (3SM) is adopted to shrink the huge searching space in a complete training process; Duplicate Network Reward (DNR) gives more accurate supervision by removing randomness during the searching process; Full Data Update (FDU) further improves the updating efficiency. Experimental results demonstrate the superiority of weighting policy explored by LAW over standard training pipeline. Compared with baselines, LAW can find a better weighting schedule which achieves much more superior accuracy on both biased CIFAR and ImageNet.
Zhenmao Li, Yichao Wu, Yudong Wu, Shunfeng Zhou
AAAI4
2020 Rotation Consistent Margin Loss for Efficient Low-Bit Face Recognition
abstract
In this paper, we consider the low-bit quantization problem of face recognition (FR) under the open-set protocol. Different from well explored low-bit quantization on closed-set image classification task, the open-set task is more sensitive to quantization errors (QEs). We redefine the QEs in angular space and disentangle it into class error and individual error. These two parts correspond to inter-class separability and intra-class compactness, respectively. Instead of eliminating the entire QEs, we propose the rotation consistent margin (RCM) loss to minimize the individual error, which is more essential to feature discriminative power. Extensive experiments on popular benchmark datasets such as MegaFace Challenge, Youtube Faces (YTF), Labeled Face in the Wild (LFW) and IJB-C show the superiority of proposed loss in low-bit FR quantization tasks.
Yudong Wu, Yichao Wu, Ruihao Gong, Yuanhao Lv, Ding Liang, Xiaolin Hu 0001, Xianglong Liu 0001
CVPR1
2020 Face Image Quality Assessment for Model and Human Perception
abstract
Practical face image quality assessment (FIQA) models are trained under the supervision of labeled data, which requires more or less human labor. The human labeled quality scores are consistent with perceptual intuition but laborious. On the other hand, models can be trained with data generated automatically by the recognition models with artificially selected references. However, the recognition scores are sometimes inaccurate, which may give wrong quality scores during FIQA training. In this paper, we propose a labour-saving method for quality scores generation. For the first time, we conduct systematic investigations to show that there exist severe contradictions between different types of target quality, namely distribution gap (DG). To bridge the gap, we propose a novel framework for training FIQA models by combining the merits of data from different sources. In order to make the target score from multiple sources compatible, we design a method called quality distribution alignment (QDA). Meanwhile, to correct the wrong target by recognition models, contradictory samples selection (CSS) is adopted to select samples from the human labeled dataset adaptively. Extensive experiments and analysis on public benchmarks including MegaFace has demonstrated the superiority of our in terms of effectiveness and efficiency.
Yichao Wu, Zhenmao Li, Yudong Wu, Ding Liang
ICPR4
2020 Tuning applications for efficient GPU offloading to in-memory processing
abstract
Data movement between processors and main memory is a critical bottleneck for data-intensive applications. This problem is more severe with Graphics Processing Units (GPUs) applications due to their massive parallel data processing characteristics. Recent research has shown that in-memory processing can greatly alleviate this data movement bottleneck by reducing traffic between GPUs and memory devices. It offloads execution to in-memory processors, and avoids transferring enormous data between memory devices and processors. However, while in-memory processing is promising, to fully take advantage of such architecture, we need to solve several issues. For example, the conventional GPU application code that is highly optimized for the locality to execute efficiently in GPU does not necessarily have good locality for in-memory processing. As such, the GPU may mistakenly offload application routines that cannot gain benefit from in-memory processing. Additionally, workload balancing cannot simply treat in-memory processors as GPU processors since its data transfer time can be significantly reduced. Finally, how to offload application routines that access the shared memory inside GPUs is still an unsolved issue.
Yudong Wu, Mingyao Shen, Yi-Hui Chen, Yuanyuan Zhou 0001
ICS1
2019 Towards Continuous Access Control Validation and Forensics
abstract
Access control is often reported to be "profoundly broken" in real-world practices due to prevalent policy misconfigurations introduced by system administrators (sysadmins). Given the dynamics of resource and data sharing, access control policies need to be continuously updated. Unfortunately, to err is human-sysadmins often make mistakes such as over-granting privileges when changing access control policies. With today's limited tooling support for continuous validation, such mistakes can stay unnoticed for a long time until eventually being exploited by attackers, causing catastrophic security incidents. We present P-DIFF, a practical tool for monitoring access control behavior to help sysadmins early detect unintended access control policy changes and perform postmortem forensic analysis upon security attacks. P-DIFF continuously monitors access logs and infers access control policies from them. To handle the challenge of policy evolution, we devise a novel time-changing decision tree to effectively represent access control policy changes, coupled with a new learning algorithm to infer the tree from access logs. P-DIFF provides sysadmins with the inferred policies and detected changes to assist the following two tasks: (1) validating whether the access control changes are intended or not; (2) pinpointing the historical changes responsible for a given security attack. We evaluate P-DIFF with a variety of datasets collected from five real-world systems, including two from industrial companies. P-DIFF can detect 86%-100% of access control policy changes with an average precision of 89%. For forensic analysis, P-DIFF can pinpoint the root-cause change that permits the target access in 85%-98% of the evaluated cases.
Chengcheng Xiang, Yudong Wu, Bingyu Shen 0002, Mingyao Shen, Haochen Huang, Tianyin Xu, Yuanyuan Zhou 0001, Cindy Moore, Xinxin Jin, Tianwei Sheng
CCS2
2018 CRAT: Enabling Coordinated Register Allocation and Thread-Level Parallelism Optimization for GPUs
abstract
The key to the high performance on GPUs lies in the massive threading to enable thread switching and hide long latencies. GPUs are equipped with a large register file to enable fast context switch. However, thread throttling techniques that are designed to mitigate cache contention, lead to under-utilization of registers. Register allocation is a significant factor for performance as it not just determines the single-thread performance, but indirectly affects the TLP. In this paper, we propose Coordinated Register Allocation and Thread-level parallelism (CRAT) to explore the optimization space of register allocation and TLP management on GPUs. CRATemploys both compile-time(CRAT-static) and run-time techniques(CRAT-dyn) to exhaust the design space. CRAT-static works statically to explore TLP and register allocation trade-off and CRAT-dyn exploits dynamic register allocation for further improvement. Experiments indicate that CRAT-static achieves an average 1.25X speedup over existing TLP management technique. On four register-limited applications, CRAT-dyn further improves the performance speedup of CRAT-static from 1.51X to 1.70X.
Xiaolong Xie, Yun Liang 0001, Yudong Wu, Guangyu Sun 0003, Tao Wang 0004, Dongrui Fan
IEEE Trans. Computers4
2015 Enabling coordinated register allocation and thread-level parallelism optimization for GPUs
abstract
The key to high performance on GPUs lies in the massive threading to enable thread switching and hide the latency of function unit and memory access. However, running with the maximum thread-level parallelism (TLP) does not necessarily lead to the optimal performance due to the excessive thread contention for cache resource. As a result, thread throttling techniques are employed to limit the number of threads that concurrently execute to preserve the data locality. On the other hand, GPUs are equipped with a large register file to enable fast context switch between threads. However, thread throttling techniques that are designed to mitigate cache contention, lead to under utilization of registers. Register allocation is a significant factor for performance as it not just determines the single-thread performance, but indirectly affects the TLP.
Xiaolong Xie, Yun Liang 0001, Yudong Wu, Guangyu Sun 0003, Tao Wang 0004, Dongrui Fan
MICRO4