Gang Dou

dblp:141/7647 · DBLP profile ↗
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10ranked-venue papers
1as first author
10since 2021 · last 2026
0000-0002-2631-1734ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 1 first-author · 6 since 2021Artificial intelligence and machine learning · 3 · 3 since 2021Databases, data management, data science and information retrieval · 1 · 1 since 2021
YearPublicationVenuePosition
2026 A bio-inspired neuromorphic system for fusing visual features and autonomous learning
Mei Guo, Yaoyao Zi, Jikang Liu, Qiye Yang, Jingzhi Xu, Gang Dou, Da Chen 0004
Neural Networks7
2026 A Neuromorphic Circuit With Supramodal Attention Effects Based on Cognitive Resource Limitation
abstract
When organisms face complex environments, the cognitive resource limitation is an important mechanism to ensure the quality of perceived information and prevent information overload. Organisms allocate cognitive resources rationally by regulating attention, thus promoting more important cognitive orientations. However, this phenomenon has been scarcely investigated within the realm of memristive biomimetic circuits. The prefrontal cortex (PFC), as the highest central hub for attention control, achieves goal-oriented attentional selection by assigning the basal ganglion to suppress irrelevant information. Based on this biological mechanism, a neuromorphic circuit has been designed in this paper to implement the attentional regulation function of the PFC between bimodal sensory inputs. When organisms face multi-sensory information input, the enhancement and inhibition effects in the supramodal attention effects are considered. In addition, the circuit realizes biological phenomena such as temporal consistency, semantic consistency, emotional attention, and attention fatigue. The attention regulation mechanism is further extended to more senses with variable sensitivities, providing variable strategies for performing tasks in different scenarios. Performance analysis results demonstrate that the circuit exhibits excellent robustness. This work provides guidance for the further development of information processing in brain-inspired intelligence.
Mei Guo, Chenguang Zheng, Gang Dou, Herbert H. C. Iu
IEEE Trans. Circuits Syst. I Regul. Pap.3
2026 Multisensory Memristive Circuits With Parallel Processing and Dual Adaptive Features
abstract
As the brain-like intelligence develops rapidly, it is urgent to design a more convenient and efficient control framework to cope with the challenge of processing multisensory signals in parallel. Therefore, a multisensory memristive circuit with dual adaptive, parallel processing, and multilevel reinforcement features is proposed. The circuit is mainly composed of modules for receptors, STM and LTM, attention, environmental monitoring and mutual associative memory. Automatic encoding of different sensorial signals is realised by the receptor modules. Dual adaptive regulation of the internal associative memory and external environmental changes on the circuit is implemented by modules of attention and environmental monitoring. Multilevel reinforcement memory is achieved through the interconnection of multiple dimensional features of the same objects. The process of encoding transformation of stimuli, experience memory, and feedback learning is automatically achieved in the brain-inspired neural network structure, which avoids the problems such as encoding difficulties during the conversion of the operating objects, and enables the realization of more brain-like intelligence. The circuit is applied to gripping and recognizing in robotic arms and the scenario memory of different production lines is simulated, which is promising for application in automated factories.
Mei Guo, Xingwei Zhang, Wenhai Guo, Gang Dou, Da Chen 0004, Herbert H. C. Iu
IEEE Trans. Circuits Syst. I Regul. Pap.4
2025 Design and Application of Brain-Inspired Circuit With Context-Dependent and State-Dependent Memory
abstract
The context and the state of mind are important retrieval cues for long-term memory, which helps information to be retrieved quickly. However, most memristive circuits focus on the process of information memory, few studies consider the process of information retrieval. In this work, a brain-inspired circuit with context-dependent and state-dependent memory is proposed based on the three-level processing model of memory information, which integrates the processes of information memory and information retrieval. The circuit includes sensory memory module, short-term memory module, long-term memory module, information retrieval module, status module, and context module. In the circuit, information, contexts, and states are eventually transferred to long-term memory module for storage and retrieval. Meanwhile, the factors influencing information retrieval are considered, such as the degree of information memory, the time interval between information memory and retrieval, the context, and the state. And the proposed circuit has scalability, which realizes the memory of information in multiple contexts. Finally, based on the characteristics of memristors, the proposed circuit is extended for detecting damage to the machining accuracy of the mobile CNC lathe. Combining brain-inspired circuits with human memory mechanism, this work provides further reference for the research of brain-like intelligence.
Gang Dou, Daoguo Li, Mei Guo, Herbert H. C. Iu
IEEE Trans. Circuits Syst. I Regul. Pap.1
2025 A High-Performance Memristive Circuit Design for DCGAN in Edge Computing
abstract
Edge computing devices based on the von Neumann architecture can’t fulfill the demand for computational resources in Generative Adversarial Networks. This paper proposes a memristive circuit design for a light-weight and efficient Deep Convolutional Generative Adversarial Networks (DCGAN), which can be integrated into edge computing devices for image generation. The DCGAN scheme can perform convolution operations, deconvolution operations, and various activation functions in a fast and low-power way. Moreover, a high-precision segmental approximate linear weight mapping method based on the 2-Memristor crossbar array structure is proposed to improve the precision of memristive neural networks on edge computing devices. Finally, the results show that the DCGAN scheme significantly reduces the power consumption, time consumption, and input ports while keeping the area overhead unchanged. In the Oxford 17 image generation task, the DCGAN scheme achieves faster speed and lower power consumption compared to the traditional structure. The DCGAN scheme based on memristive circuits provides some references for implementing more intelligent applications on edge devices.
Mei Guo, Gang Dou, Herbert H. C. Iu
IEEE Trans. Circuits Syst. I Regul. Pap.3
2025 A Knowledge Distillation Online Training Circuit for Fault Tolerance in Memristor Crossbar Array-Based Neural Networks
abstract
Knowledge distillation is widely used as an effective model compression technique to improve the performance of small models. Most of the current researches on knowledge distillation focus on the algorithmic level and ignore the potential benefits of hardware implementation. In this paper, a multi-loss knowledge distillation online training circuit based on memristor crossbar array is designed, which can improve the inference efficiency and reduce the power consumption of deep learning models on edge devices. The circuit is able to process data in real time, and it can be used to handle stuck-at-faults (SAF) caused by factors such as manufacturing defects in the memristor. Moreover, a fault detection scheme with low time cost is proposed in order to address the low efficiency of stuck-at-fault detection in memristor crossbar arrays. The scheme is combined with a self-compensating pruning method and knowledge distillation online training mechanism, which significantly improves the model training and inference capability of the circuit under fault conditions. Experimental results show that the multi-loss knowledge distillation online training improves the accuracy by 4.15% and 63.48% respectively in two models compared with traditional training schemes. The fault-tolerance scheme reduces the power consumption of the memristor crossbar arrays by 41.2% and 72.6% respectively on the two models, demonstrating its potential and advantages in edge computing.
Mei Guo, Xingwei Zhang, Gang Dou, Herbert H. C. Iu
IEEE Trans. Circuits Syst. I Regul. Pap.3
2025 Adaptive Fuzzy Fixed-Time Control for Uncertain Time-Delay Nonlinear Systems With Output Constraints
abstract
This paper aims to address two complex issues in the control of a class of high-order time-delay nonlinear systems: i) the adaptive fixed-time tracking control and ii) the differential explosion arising from the iterative derivation of the intermediate control law during the design process. The issue is how to construct a tracking controller to ensure that the tracking error converges to an adjustable region around the origin in a fixed time. This article develops an adaptive fixed-time control strategy by employing fuzzy logic system (FLS) to approximate the unknown function terms and the nonlinear growth assumption often used in unknown systems is eliminated. This strategy combines the dynamic surface technology with the first-order filtered signals in recursive design, and effectively addresses the sticky problem of complexity explosion in controller design. Finally, the effectiveness and feasibility of this control scheme are demonstrated through a single-link manipulator system and a numerical example
Gang Dou, Tianliang Zhang 0004, Weihai Zhang, Mei Guo
IEEE Trans. Fuzzy Syst.2
2024 Neuromorphic Circuit of Classical and Operant Conditioning Based on Tunable Neural Circuitry Motifs
abstract
Most memristive bionic circuits focus on how to realize bionic functions, few studies consider the biomimetic of the circuit structure and operation rules, so it is difficult to learn, memorize, and make decisions as biological neural networks. In this work, a multifunctional neuromorphic circuit inspired by tunable neural circuitry motifs is proposed. The circuit is more closely with biological characteristics in both structure and functions, which is designed based on neural circuit architectures. By connecting different neural circuitry motifs, the circuit realizes operant conditioning functions such as random exploration, behavioral frequency modulation, and decision-making. Also, the circuit integrated classical conditioning and operant conditioning in order to mimic the decision-making process, which was driven by the association of secondary and primary stimuli. In addition, the factors influencing decision-making are researched, such as the rates of learning and forgetting, and the conversion of short-term to long-term memory. The operational results of the proposed circuits in LTspice show that they can mimic the aforementioned functions, which have advantages in bionicity and scalability. This work can be applied in intelligent robotic platforms to achieve exploration and rescue in complex environments.
Mei Guo, Lingtong Kong, Gang Dou, Herbert H. C. Iu
IEEE Trans. Circuits Syst. I Regul. Pap.3
2023 Implementing bionic associate memory based on spiking signal
Mei Guo, Kaixuan Zhao, Junwei Sun 0002, Shiping Wen 0001, Gang Dou
Inf. Sci.5
2022 An associative memory circuit based on physical memristors
Mei Guo, Yongliang Zhu, Renyuan Liu, Kaixuan Zhao, Gang Dou
Neurocomputing5