Masayuki Kokado

dblp:142/0878 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1988
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
2 papers
Physical-layer communications · 100%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Integrated circuit design · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Physical-layer communications
optical communication
0.021988
Gigabit receiver ICs for optical communications · IEEE J. Sel. Areas Commun. 1988
400 Mbit/s Optical Regenerator Integrated Circuits · IEEE J. Sel. Areas Commun. 1986
Integrated circuit design
analog and mixed-signal circuits
0.021988
Gigabit receiver ICs for optical communications · IEEE J. Sel. Areas Commun. 1988
400 Mbit/s Optical Regenerator Integrated Circuits · IEEE J. Sel. Areas Commun. 1986
Physical-layer communications › signal processing for communications
signal regeneration
0.011986
400 Mbit/s Optical Regenerator Integrated Circuits · IEEE J. Sel. Areas Commun. 1986

Methods — techniques the papers use, named apart from their topics

bipolar process · 0.0
YearPublicationVenuePosition
1988 Gigabit receiver ICs for optical communications
abstract
The authors discuss gigabit receiver ICs for optical communications, focusing on their circuit and package design, the performance of receivers that were fabricated, and their application to a 1.6 Gb/s optical receiver. The key technologies for the receivers are discussed, and a design based on these key technologies is proposed. The proposed design is used to fabricate six receiver ICs (eight chips) using an ultra-high-speed bipolar process with transistors having a unity gain bandwidth of 6-8 GHz. The receivers are suitable for long-haul optical transmission at bit rates up to 1.6 Gb/s. Experimental results show that the 1.6 Gb/s receiver has an optical dynamic range of more than 23 dB without any adjustment, and the received average optical power required to maintain a 10/sup -11/ error rate is less the -31 dBm.>
Kazuo Yamaguchi, Hiroo Kitasagami, Masaaki Kawai, Izumi Amemiya, Takashi Touge, Haruo Tamada, Masayuki Kokado, Masahiro Sugimoto
IEEE J. Sel. Areas Commun.7
1986 400 Mbit/s Optical Regenerator Integrated Circuits
abstract
This paper discusses 400 Mbit/s optical regenerator integrated circuits, focusing on their circuit architecture and performance, and describes their application to a 400 Mbit/s optical regenerator. The basic design concepts for high-speed regenerator IC's are discussed and a new integrated circuit architecture based on these design concepts is proposed. The proposed architecture of regenerator IC's is used to fabricate five IC chips (Reshaping IC, Retiming IC, Decision IC, LD driver IC, and dc-to-dc converter IC) using a high-speed bipolar process with transistors having a unity gain bandwidth of 5 GHz. The combination of these IC's can achieve submarine and terrestrial long-haul optical transmission at bit rates up to 450 Mbits/s. These IC's are applied to a 400 Mbit/s IC optical regenerator. Experimental results show that the IC optical regenerator has an optical dynamic range of more than 27 dB without any adjustment and received average optical power required to maintain a 10-11error rate is less than -38 dBm. Experimental results fully satisfy the system requirements, and the feasibility of commercial application is demonstrated.
Kazuo Yamaguchi, Hiroo Kitasagami, Mitsuhiro Motegi, Fumio Ogawa, H. Nishiomoto, Hiromu Iwamoto, Masayuki Kokado
IEEE J. Sel. Areas Commun.7