EDBT 2026 Demo / reviewers in the wild / expert
Junting Wu
dblp:142/3627
· DBLP profile ↗
6ranked-venue papers
0as first author
3since 2021 · last 2022
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 3 since 2021Artificial intelligence and machine learning · 1Applied, interdisciplinary, general and emerging computing · 1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2022 | NIC-QF: A design of FPGA based Network Interface Card with Query Filter for big data systems
Jinyu Zhan, Wei Jiang 0016, Ying Li 0130, Junting Wu, Jianping Zhu 0003, Jinghuan Yu |
Future Gener. Comput. Syst. | 4 |
| 2022 | Accelerating Queries of Big Data Systems by Storage-Side CPU-FPGA Co-DesignabstractAs a promising technology of big data systems, storage and computing separated architecture has attracted increasing attention of famous companies, such as Tencent, IBM, Facebook, and Microsoft. Under this new architecture, conventional query engines like Hive and Presto choose all the original data from storage nodes and send them to computing nodes to be filtered, causing high data transmission overhead and great I/O bandwidth fluctuation. To address this problem, we design a novel data processing framework to prefilter data on storage side, and then propose a CPU-FPGA (field-programmable gate array) co-design to accelerate the queries with the purpose of reducing the communication overheads and the workloads of computing nodes. To obtain the optimal efficiency of CPU-FPGA co-processing, a workload-aware task scheduler is designed to allocate query tasks to CPU or FPGA according to the estimation of the filtering data size and processing time of query tasks. A data projection scheme is designed to support data in RCFile format which is widely used in modern systems, such as Tencent and Facebook applications. To make full use of the high parallelism of FPGA, we formulate the SQL conditions of combined predicates into Boolean parameters, and design two filtering schemes on FPGA (i.e., parallel sequential filter for fix-length data type and parallel pipeline filter for variable-length data type). Experiments on the TPC-H benchmark and Tencent data set demonstrate the efficiency of our approach, which can save up to 72.28% and 80.16% of time overheads compared with Presto and Hive, respectively. Jinyu Zhan, Wei Jiang 0016, Ying Li 0130, Junting Wu, Jianping Zhu 0003, Jinghuan Yu |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 4 |
| 2022 | Detecting Spoofed Speeches via Segment-Based Word CQCC and Average ZCR for Embedded SystemsabstractIntelligent speech recognition is increasingly used in embedded systems, which is also seriously threatened by malicious speech spoofing attacks. Different from the conventional methods, this article proposes a segment-based anti-spoofing detection (SASD) method for the quick detection of spoofed speeches against embedded speech recognition, which focuses on the anti-spoofing features rather than the contexts of speeches and the voiceprints of speakers. The speeches are divided into word segments and silent segments. Based on constant$Q$cepstral coefficients (CQCCs), a word CQCC (WCQCC) extraction is first designed for the word segments of speeches. Then, based on short-term zero crossing rate (ZCR), an average ZCR (AZCR) extraction is devised for the silent segments. Combining the WCQCC of word segments and AZCR of silent segments, a biased decision strategy is proposed to quickly determine whether a speech is spoofed. Based on ASVspoof 2021 datasets, extensive experiments are conducted to evaluate the effectiveness of the proposed method. Specifically, our SASD can improve the accuracy of anti-spoofing detection by up to 33.47% and save up to 69.10% of time overhead on embedded devices compared with the existing methods. Jinyu Zhan, Zhibei Pu, Wei Jiang 0016, Junting Wu, Yongjia Yang |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 4 |
| 2020 | An FPGA based Network Interface Card with Query Filter for Storage Nodes of Big Data SystemsabstractIn this paper, we are interested in improving the data processing of storage and computing separated Big Data systems. We propose an Field Programmable Gate Array (FPGA) based Network Interface Card with Query Filter (NIC-QF) to accelerate the data query efficiency of storage nodes and reduce the workloads of computing nodes and the communication overheads between them. NIC-QF designed with PCIe core, query filter and NIC communication can filter the original data on storage nodes as an implicit coprocessor and directly send the filtered data to computing nodes of Big Data systems. Filter units in query filter can perform multiple SQL tasks in parallel, and each filter unit is internally pipelined, which can further speed up the data processing. Filter units can be designed to support general SQL queries on different data formats and we implement two schemes for TextFile and RCFile separately. Based on TPC-H benchmark and Tencent data set, we conduct extensive experiments to evaluate our design, which can achieve averagely up to 46.91% faster than the traditional approach. Ying Li 0130, Jinyu Zhan, Wei Jiang 0016, Junting Wu, Jianping Zhu 0003 |
ASP-DAC | 4 |
| 2014 | A method to evaluate the spatial extensibility of a switching unit and network
Junting Wu, Binqiang Wang, Hui Li 0022 |
Sci. China Inf. Sci. | 2 |
| 2014 | Domain Adaptation for Face Recognition: Targetize Source Domain Bridged by Common Subspace
Meina Kan, Junting Wu, Shiguang Shan, Xilin Chen 0001 |
Int. J. Comput. Vis. | 2 |