Demo Data from EDBT 2026 / reviewers in the wild / expert
Matt Grimm
dblp:143/4788
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 2020
0000-0003-2093-9704ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 33% Electronic design automation · 33% Reconfigurable computing and FPGAs · 33% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware accelerators and domain-specific architectures › pattern matching accelerator
automata processor |
0.4 | 1 | 2019 | Evaluating High Performance Pattern Matching on the Automata Processor · IEEE Trans. Computers 2019 |
Electronic design automation › hardware verification and test
pattern matching |
0.4 | 1 | 2019 | Evaluating High Performance Pattern Matching on the Automata Processor · IEEE Trans. Computers 2019 |
Reconfigurable computing and FPGAs
reconfigurable computing |
0.4 | 1 | 2019 | Evaluating High Performance Pattern Matching on the Automata Processor · IEEE Trans. Computers 2019 |
Methods — techniques the papers use, named apart from their topics
NFA emulation · 0.4FPGA implementation · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2020 | Interval stabbing on the Automata Processor
Indranil Roy, Ankit Srivastava, Matt Grimm, Srinivas Aluru |
J. Parallel Distributed Comput. | 3 |
| 2019 | Evaluating High Performance Pattern Matching on the Automata ProcessorabstractIn this paper, we study the acceleration of applications that identify all the occurrences of thousands of string-patterns in an input data-stream using the Automata Processor (AP). For this evaluation, we use two applications from two fields, namely, cybersecurity and bioinformatics. The first application, called Fast-SNAP, scans network data for 4312 signatures of intrusion derived from the popular open-source Snort database. Using the resources of a single AP-board, Fast-SNAP can scan for all these signatures at 1 Gbps. The second application, called PROTOMATA, looks for all the occurrences of 1,309 motifs from the PROSITE database in protein sequences. PROTOMATA is up to 68 times faster than the state-of-the-art CPU implementation. As a comparison, we emulate the execution of the same NFAs by programming FPGAs using state-of-the-art techniques. We find that the performance derived by using the resources of a single AP-board, which houses 32 AP-chips, is comparable to that of the resources of five to six large FPGAs. The design techniques used in this paper are generic and may be applicable to the development of similar applications on the AP. Indranil Roy, Ankit Srivastava, Matt Grimm, Marziyeh Nourian, Michela Becchi, Srinivas Aluru |
IEEE Trans. Computers | 3 |