EDBT 2026 Demo / reviewers in the wild / expert
Lorenzo Zuolo
dblp:144/4466
· DBLP profile ↗
3ranked-venue papers
3as first author
0since 2021 · last 2017
0000-0002-0625-0540ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Storage systems · 77% Electronic design automation · 14% Performance modeling and evaluation · 4% |
Topics — the 7 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Storage systems › flash and SSD
solid-state drive |
0.5 | 2 | 2017 | Solid-State Drives: Memory Driven Design Methodologies for Optimal Performance · Proc. IEEE 2017 SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2015 |
Storage systems
flash and SSD |
0.3 | 1 | 2017 | Solid-State Drives: Memory Driven Design Methodologies for Optimal Performance · Proc. IEEE 2017 |
Storage systems
storage reliability |
0.3 | 1 | 2017 | Solid-State Drives: Memory Driven Design Methodologies for Optimal Performance · Proc. IEEE 2017 |
Electronic design automation
design space exploration |
0.2 | 1 | 2015 | SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2015 |
Storage systems › storage architecture
software-defined storage |
0.1 | 1 | 2017 | Solid-State Drives: Memory Driven Design Methodologies for Optimal Performance · Proc. IEEE 2017 |
Performance modeling and evaluation
simulation |
0.1 | 1 | 2015 | SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2015 |
Embedded and real-time systems
virtual platform |
0.1 | 1 | 2015 | SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2015 |
Methods — techniques the papers use, named apart from their topics
simulation · 0.2analytical modeling · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2017 | Solid-State Drives: Memory Driven Design Methodologies for Optimal PerformanceabstractSolid-state drives (SSDs) faced an astonishing development in the last few years, becoming the cornerstone to new paradigms and markets of the information technology, such as cloud computing and big data centers. So far, the SSD design approach has focused on the optimization of the Flash translation layer, the firmware devoted to fulfill the compatibility with traditional hard-disk drives. For hyperscaled SSDs this strategy is no longer valid since their performance and reliability are strictly linked to that of the NAND Flash memories that constitute the storage medium, in particular when the multilevel cell paradigm is considered. For this reason, the design flow must follow a bottom-up approach that, starting from an accurate knowledge of the time and use dependent reliability of the NAND Flash memories, selects the most appropriate error correction strategy to extend the SSD lifetime while reducing its performance degradation. Then, the design flow moves to that of the SSD controller and of the interface toward the host where the application is running. This paper will thoroughly discuss this bottom-up approach, and finally, it will show how it is possible to leverage new approaches, such as the software-defined storage system that, by exploiting a hardware/software codesign of the SSD controller architecture and of the host application, will be able to revolutionize the traditional computer/memory interaction. Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Piero Olivo |
Proc. IEEE | 1 |
| 2015 | SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State DrivesabstractCurrently available electronic design automation tools for design space exploration of solid state drives (SSDs) are not able to assess: 1) the device architecture inefficiencies; 2) architecture overdesign for a target performance; and 3) performance degradation caused by the disk usage. These tools feature either an overly high abstraction modeling strategy or lack the required flexibility to perform design exploration. To overcome these problems, this paper proposes SSDExplorer, a tool for fine-grained yet reasonably fast design space exploration of different SSD architectures highlighting possible bottlenecks. To prove its accuracy SSDExplorer has been validated with two real SSDs. SSDExplorer efficiency has been assessed by evaluating the impact of the NAND flash read retry algorithm impact on the SSD performance as a function of its internal architecture. Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Davide Bertozzi, Piero Olivo |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 1 |
| 2014 | SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State DrivesabstractSolid State Drives (SSDs) are gaining particular momentum in various frameworks such as multimedia, large data centers and cloud environments. Unfortunately, efficient CAD tools for SSD design space exploration able to assess the optimization of the device microarchitecture w.r.t. the target performance are still missing. This paper tries to close this gap by proposing SSDExplorer, a tool for fine-grained and fast design space exploration of SSD devices. SSDExplorer provides unprecedented insights into the architecture behavior and subcomponent interaction efficiency, while avoiding the need for the actual implementation of an FTL or of key hardware components. This is achieved by the introduction of suitable abstractions of the different components. This is confirmed by the thorough validation of SSDExplorer against a commercial SSD device. Lorenzo Zuolo, Cristian Zambelli, Rino Micheloni, Salvatore Galfano, Marco Indaco, Stefano Di Carlo, Paolo Prinetto, Piero Olivo, Davide Bertozzi |
DATE | 1 |