Demo Data from EDBT 2026 / reviewers in the wild / expert
Jeff Jackson
dblp:146/7817
· DBLP profile ↗
4ranked-venue papers
0as first author
0since 2021 · last 2016
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3Human-computer interaction and ubiquitous computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Memory systems · 61% Storage systems · 39% | |
| Software engineering, system software, and programming languages
2 papers |
Operating systems · 50% Software testing · 50% |
Topics — the 7 heaviest of 9, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems › non-volatile memory
persistent memory |
0.4 | 2 | 2014 | Yat: A Validation Framework for Persistent Memory Software · USENIX ATC 2014 System software for persistent memory · EuroSys 2014 |
Memory systems
non-volatile memory |
0.3 | 2 | 2016 | System software for persistent memory · EuroSys 2014 Data tiering in heterogeneous memory systems · EuroSys 2016 |
Memory systems
hybrid memory |
0.2 | 1 | 2016 | Data tiering in heterogeneous memory systems · EuroSys 2016 |
Storage systems › storage hierarchy
tiered storage |
0.2 | 1 | 2016 | Data tiering in heterogeneous memory systems · EuroSys 2016 |
Storage systems
file systems |
0.2 | 1 | 2014 | System software for persistent memory · EuroSys 2014 |
Storage systems › file systems › file system design
persistent memory file system |
0.2 | 1 | 2014 | System software for persistent memory · EuroSys 2014 |
Memory systems
DRAM replacement |
0.1 | 1 | 2016 | Data tiering in heterogeneous memory systems · EuroSys 2016 |
Methods — techniques the papers use, named apart from their topics
validation · 0.4performance modeling · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2016 | Data tiering in heterogeneous memory systemsabstractMemory-based data center applications require increasingly large memory capacities, but face the challenges posed by the inherent difficulties in scaling DRAM and also the cost of DRAM. Future systems are attempting to address these demands with heterogeneous memory architectures coupling DRAM with high capacity, low cost, but also lower performance, non-volatile memories (NVM) such as PCM and RRAM. A key usage model intended for NVM is as cheaper high capacity volatile memory. Data center operators are bound to ask whether this model for the usage of NVM to replace the majority of DRAM memory leads to a large slowdown in their applications? It is crucial to answer this question because a large performance impact will be an impediment to the adoption of such systems. Subramanya Dulloor, Amitabha Roy 0002, Zheguang Zhao, Narayanan Sundaram, Nadathur Satish, Rajesh Sankaran, Jeff Jackson, Karsten Schwan |
EuroSys | 7 |
| 2014 | System software for persistent memoryabstractEmerging byte-addressable, non-volatile memory technologies offer performance within an order of magnitude of DRAM, prompting their inclusion in the processor memory subsystem. However, such load/store accessible Persistent Memory (PM) has implications on system design, both hardware and software. In this paper, we explore system software support to enable low-overhead PM access by new and legacy applications. To this end, we implement PMFS, a light-weight POSIX file system that exploits PM's byte-addressability to avoid overheads of block-oriented storage and enable direct PM access by applications (with memory-mapped I/O). PMFS exploits the processor's paging and memory ordering features for optimizations such as fine-grained logging (for consistency) and transparent large page support (for faster memory-mapped I/O). To provide strong consistency guarantees, PMFS requires only a simple hardware primitive that provides software enforceable guarantees of durability and ordering of stores to PM. Finally, PMFS uses the processor's existing features to protect PM from stray writes, thereby improving reliability. Subramanya Dulloor, Anil S. Keshavamurthy, Philip Lantz, Dheeraj Reddy, Rajesh Sankaran, Jeff Jackson |
EuroSys | 7 |
| 2014 | Yat: A Validation Framework for Persistent Memory Software
Philip Lantz, Subramanya Dulloor, Rajesh Sankaran, Jeff Jackson |
USENIX ATC | 5 |
| 1998 | Computer Engineering, Computer Science and Management Information Systems: Partners in a Unified Software Engineering CurriculumabstractThis paper describes the development of a new software engineering curriculum at the University of Alabama. This curriculum is jointly administered by three separate academic programs: computer engineering, computer science and management information systems. These programs have combined to develop a unified software engineering track, consisting of an optional sequence of courses for majors in the three programs. Our software engineering track is characterized by two key elements: the use of software component engineering as a technical foundation, and the integration of students from the three participating programs into a single capstone laboratory. The capstone laboratory involves the development of a multifaceted product, requiring the interdisciplinary cooperation of all three groups of students to complete. This paper describes the design and conceptual foundations of this program, which has received funding from the National Science Foundation. Allen S. Parrish, Richard B. Borie, David Cordes, Brandon Dixon, David P. Hale, Joanne E. Hale, Jeff Jackson, Shane Sharpe |
CSEE&T | 7 |