Zhaoxu Wang

dblp:146/7830 · DBLP profile ↗
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12ranked-venue papers
5as first author
7since 2021 · last 2026
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 2 first-author · 4 since 2021Computer networks · 3 · 1 first-author · 1 since 2021Applied, interdisciplinary, general and emerging computing · 2 · 1 first-author · 2 since 2021Artificial intelligence and machine learning · 1Software engineering, systems software and programming languages · 1 · 1 first-author
YearPublicationVenuePosition
2026 Collaborative Access With Waiting Window: Enhancing Age-of-Information in CSMA Networks
Suzhi Bi, Zhaoxu Wang, Zhi Quan
IEEE Trans. Mob. Comput.3
2026 TRO-Based Dual-Domain Voltage Co-Regulation of Digital Logic and SRAM in SoCs
abstract
Conventional low-power system-on-chips (SoCs) commonly regulate digital logic using adaptive voltage and frequency scaling (AVFS), while SRAM voltage is managed by an independent scaling policy. This separation leaves cross-domain SRAM-related critical paths over-margined and prevents system-level energy optimization. This brief presents a unified voltage co-regulation framework that jointly tunes the digital and SRAM supply rails to minimize total SoC energy. A tunable replica oscillator (TRO) is repurposed from a digital timing monitor into a dual-mode delay allocator: its programmable level sets the digital timing slack, and an all-digital AVFS loop adjusts the digital supply to lock the target frequency. The released cycle budget is then converted into SRAM voltage reduction, determined by a cache-based canary test. Domain-level power is profiled on-chip to enable a measurement-driven search for the dual-domain minimum-energy point (DD-MEP) without relying on PVT-dependent model parameters. Silicon results from a taped-out 110-nm Cortex-M3 SoC demonstrate up to 11.4% total energy reduction compared with digital-only AVFS, with only 0.05% area overhead.
Zhaoxu Wang, Mingyang Gong, Zhenglin Liu, Xuecheng Zou
IEEE Trans. Very Large Scale Integr. Syst.1
2025 Weighted Mean Field Q-Learning for Large Scale Multiagent Systems
abstract
Mean field reinforcement learning (MFRL) addresses the problem of dimensional explosion for large-scale multiagent systems. However, MFRL averages the actions of neighbors equally while discarding the diversity and distinct features between individuals, which may lead to poor performance in many application scenarios. In this article, a new MFRL algorithm termed temporal weighted mean filed Q-learning (TWMFQ) is proposed. TWMFQ introduces a temporal compensated multihead attention structure to construct the weighted mean-field framework, which can sort out the complex relationships within the swarm into the interactions between specific agent and the weighted virtual mean agent. This approach allows the mean Q-function to represent the swarm behavior more informatively and comprehensively. In addition, an advanced sampling mechanism called mixed experience replay is established, which enriches the diversity of samples and prevents the algorithm from falling into local optimal solution. The comparison experiments on MAgent and multi-USV platform justify the superior performance of TWMFQ across different population sizes.
Zhuoying Chen, Huiping Li 0003, Zhaoxu Wang, Bing Yan 0001
IEEE Trans. Ind. Informatics3
2025 A Fault Diagnosis Method for Quadruped Robot Based on Hybrid Deep Neural Networks
abstract
The complex and precise mechanical mechanism of quadruped robots is prone to faults, which brings challenges to the reliability and stability of the system. Therefore, it is of significant to develop the fault diagnosis method for quadruped robots, which can provide effective fault information for active fault-tolerant control. In this article, we propose a novel fault detection and isolation method for quadruped robots based on convolution neural networks, gated recurrent units, and attention networks, which can detect and isolate joint faults in real time. The proposed method can automatically learn meaningful high-level spatial and temporal features from sensors data. The effectiveness of the method is verified by the Laikago robot compound fault data.
Zhaoxu Wang, Huiping Li 0003, Zhuoying Chen, Qing-Long Han
IEEE Trans. Ind. Informatics1
2025 A Fast and Energy-Efficient Level Shifter With Complementary Output Buffer for Energy-Constrained Systems
abstract
This brief presents a 55-nm level shifter (LS) that enables wide voltage range conversion from 80mV to 1.2V with high energy efficiency and fast transition speed. The proposed design incorporates a complementary output buffer and an assist discharge path to suppress the short-circuit current and enhance the transition speed. A multithreshold transistor strategy is adopted to expand the input range and reduce static power. Measurement results across 15 samples demonstrate robust subthreshold performance with 4.4-ns transition delay and 49.1-fJ/transition energy during 0.3–1.2-V conversion at 1MHz. The measured average minimum convertible input voltages are 80 and 139mV at input frequencies of 50kHz and 1MHz, respectively. The compact layout occupies only 7.96$\mu $m2. Compared to the best benchmarked prior work, the proposed LS achieves 33.8% improvement in energy-delay metrics, making it a highly efficient and scalable solution for energy-constrained systems and the Internet of Things (IoT).
Zhaoxu Wang, Liaoyuan Li, Zhenglin Liu
IEEE Trans. Very Large Scale Integr. Syst.2
2025 An Efficient Wide-Voltage Processor With PVTA Tolerance, Voltage Droop Mitigation, and Runtime Ultrafine-Grained Frequency Adaptation
abstract
Traditional processors require substantial design margins to account for process, voltage, temperature, and aging (PVTA) variations, resulting in significant energy efficiency losses. Existing dynamic timing error detection and correction (EDaC) techniques reduce these margins but incur high area overhead and design complexity. In this brief, we propose a processor based on the RI5CY core that integrates a PVTA tolerance and voltage droop mitigation adaptive voltage frequency scaling (AVFS) system. This approach reduces overhead to only 0.065%, enables ultrafine-grained frequency adaptation, and actively mitigates abrupt voltage droops. Additionally, a novel baud rate adaptive UART (BRA-UART) module ensures robust communication across all frequencies. Our processor design achieves a 163% typical performance gain and a 37.7% power reduction in the logic circuitry at near-threshold voltage (NTV), substantially improving energy efficiency.
Zhaoxu Wang, Zhenglin Liu
IEEE Trans. Very Large Scale Integr. Syst.4
2024 iEDCL: Streamlined, False-Error-Free Error Detection and Correction Scheme in a Near-Threshold Enabled 32-bit Processor
abstract
This article presents internal error detection, correction, and latching (iEDCL), a designer-friendly, fully functional error detection and correction (EDAC) approach tailored for energy-efficient near-threshold systems capable of tolerating variations. It embeds error detection (ED), correction, and latching circuits within a flip-flop (FF) with an additional 15 transistors to monitor critical paths. Notably, iEDCL’s error-aware capability remains stable despite clock latency and parasitic effects, relieving designers of extensive involvement and eliminating false errors. iEDCL is automatedly implemented in an ARM Cortex-M0 processor at 55 nm without extra architecture modifications, incurring only a 6.78% area overhead. An adaptive voltage scaling (AVS) loop enables automatic operation, achieving high energy efficiency beyond the point of the first failure while maintaining a predefined error rate. Measurement results obtained from different dies at various temperatures demonstrate significant energy savings achieved by the iEDCL processor, with up to 16.9% and 49.1% reductions compared to critical baseline and signoff designs, respectively, while maintaining a 5% error rate at a 16 MHz frequency. To the best of our knowledge, this article presents one of the first FF EDAC implementations fully operational without potential false errors at near-threshold voltages while enhancing energy efficiency.
Zhaoxu Wang, Zhenglin Liu
IEEE Trans. Very Large Scale Integr. Syst.4
2019 Prediction of electricity consumption in cement production: a time-varying delay deep belief network prediction method
Xiaochen Hao, Zhaoxu Wang, Zeyu Shan, Yantao Zhao
Neural Comput. Appl.2
2018 Solving Selfish Routing in Route-by-Name Information-Centric Network Architectures
abstract
Information-Centric Networking (ICN) is a promising network paradigm for the future Internet. As in the current Internet, selfish routing is also crucial problem in ICN. To the best of our knowledge, however, the selfish routing problem in ICN is remaining an unresolved challenge. To fill this gap, in this paper we propose a Nash Bargaining based content registration (NBREG) method, which is used for register content names (dissemination of content reachability information) from the game theoretic perspective. NBREG allows neighboring domains to cooperate with each other without revealing their internal private information. Based on results from real (inter-domain topology) trace simulations and prototype implementations, we show that neighboring domains can obtain more benefits with NBREG than they register and forward contents selfishly.
Jiawei Li 0002, Hongbin Luo, Mingshuang Jin, Shui Yu 0001, Zhaoxu Wang
GLOBECOM5
2018 MOT: A Compatible Transport Mechanism of Mobile Edge Computing and Conventional Traffic
abstract
In recent years, the mobile edge computing (MEC) has achieved various of research interests. By offloading data from the user equipments (UEs) to the MEC servers, many computationally demanding applications can be processed at the edge of the mobile networks. However, the data offloading of MEC needs to share the bandwidth with the conventional traffic in the mobile edge link. Simply using TCP on MEC offloading causes bandwidth robbery to the conventional TCP traffic. On the other hand, in the highly lossy wireless link environments, TCP fails to satisfy the MEC's strict requirement on the short transport delay. Therefore, we propose the MEC offloading transport (MOT) mechanism. MOT uses the prioritized queueing to avoid bandwidth robbery to the conventional traffic, and also uses the per-hop reliability to achieve loss-insensitive bandwidth utilization. The evaluation results show that MOT successfully avoids degrading the QoS of the conventional services, and achieves almost full utilization on the remaining bandwidth.
Zhaoxu Wang, Huachun Zhou, Bohao Feng, Wei Quan 0001
VTC Spring1
2014 Rumor source detection with multiple observations: fundamental limits and algorithms
abstract
This paper addresses the problem of a single rumor source detection with multiple observations, from a statistical point of view of a spreading over a network, based on the susceptible-infectious model. For tree networks, multiple sequential observations for one single instance of rumor spreading cannot improve over the initial snapshot observation. The situation dramatically improves for multiple independent observations. We propose a unified inference framework based on the union rumor centrality, and provide explicit detection performance for degree-regular tree networks. Surprisingly, even with merely two observations, the detection probability at least doubles that of a single observation, and further approaches one, i.e., reliable detection, with increasing degree. This indicates that a richer diversity enhances detectability. For general graphs, a detection algorithm using a breadth-first search strategy is also proposed and evaluated. Besides rumor source detection, our results can be used in network forensics to combat recurring epidemic-like information spreading such as online anomaly and fraudulent email spams.
Zhaoxu Wang, Wenxiang Dong, Wenyi Zhang 0001, Chee-Wei Tan 0001
SIGMETRICS1
2014 A Separation Architecture for Achieving Energy-Efficient Cellular Networking
abstract
Energy-efficient cellular networking has received considerable attention recently in hope of finding novel solutions to reduce network energy consumption. In this paper, a case study is conducted for a separation architecture in which two types of base stations (BSs) simultaneously serve a geographic area, one for providing reliable coverage and the other for handling user traffic. Based on a postulated BS power model, we demonstrate that the separation architecture, when replacing the conventional macro BS with a light-weight coverage BS (CBS) and multiple traffic BSs (TBSs), significantly reduces the overall energy consumption of a cellular network. Numerical results suggest that the separation architecture can usually reduce the energy consumption by 50% or even more compared with conventional macro BS. We then investigate dynamic TBS adaptation (i.e., BS switching on/off), based on traffic load fluctuations. Closed-form results are derived to suggest approximately linear adaptation of the intensity of TBSs in the separation architecture. Moreover, we consider the optimal deployment of TBSs over a long time scale, and derive closed-form results for the optimal intensity of TBSs for a given user intensity. Extensive simulations demonstrate that the proposed separation architecture is a promising solution to enable energy-efficient cellular networking.
Zhaoxu Wang, Wenyi Zhang 0001
IEEE Trans. Wirel. Commun.1