Virtualization environments (e.g., containers and hypervisors) achieve isolation of multiple runtime entities but result in two mutually isolated guest and host layers. Such cross-ayer isolation could cause high latency and low throughput of the system. Previous aware scheduling and double scheduling fail to achieve bidirectional coordination between the guest and host layers. To address this challenge, we develop DCS3, a Dual-layer Co-aware Scheduler that combines stealing balance and synchronized priority. Stealing balancing migrates tasks between virtual CPU (vCPU) queues for load balance based on the workloads of physical CPUs (pCPUs). Synchronized priority dynamically adjusts the thread priorities running on the pCPUs according to the current vCPU workloads. The vCPUs and pC-PUs belong to the guest and host layers, respectively. Compared with aware scheduling, double scheduling, and DCS2 (i.e., DCS3 without synchronized priority), DCS3 has the following obvious advantages: 1) Requests Per Second (RPS) increases by up to 52%, 55%, and 2%, respectively; 2) request latency decreases by up to 72%, 71%, and 20%, respectively.

Time-Sensitive Networking (TSN) is widely used in Advanced Driver Assistance Systems (ADAS) owing to its high reliability, low latency, and deterministic transmission. ADAS utilizes automotive TSN switches to connect various sensors and actuators, facilitating deterministic communication for different data flows. The Time-Aware Shaper (TAS) in automotive TSN switch uses a pre-configured Gate Control List (GCL) for deterministic transmission of TSN flows. The GCL specifies the states of all gates (queues) and periodic transmission times, including Time-Triggered (TT), Audio Video Bridging (AVB), and Best-Effort (BE) queues. The widely used methods involve generating a GCL configuration file offline before scheduling, known as statically configured GCL. However, there are non-periodic but safety-critical Event-Triggered (ET) flows in ADAS, such as traffic incidents or alarms. ET flows are triggered by emergency events and require a timely response. In other words, ET flows should be transmitted immediately after TT flows. The statically configured GCL cannot provide timely scheduling for ET flows, as the time required for its reconfiguration is significantly longer than the time needed to configure ET flows. In this study, we propose a Dynamically Configurable GCL (DC-GCL) to adapt to the transmission of ET flows in automotive TSN switch for ADAS. We design a dynamic ET flow transmission solution in DC-GCL without affecting TT flows transmission. DC-GCL defines the ET flow as the second highest priority, allowing it to preempt the transmission of AVB and BE queues. We design a dynamic GCL scheduling window to calculate the queue and transmission time of ET flows. We further present a dynamic GCL configuration algorithm to initialize the GCL and enable dynamic GCL modification. We build a TSN-based ADAS prototype platform consisting of automotive-grade development boards and deploy DC-GCL in this platform. Experimental results show that DC-GCL significantly improves the scalability of GCL in different ADAS scenarios. Compared with statically configured GCL, DC-GCL reduces the end-to-end delay of TT flows by 40.9%-53.6% and ET flows by 81.1% -82.3%.

With the rapid development of deep learning techniques in mobile and embedded devices, light-weight inference engines (e.g., Paddle Lite and TensorFlow Lite) are emerged. In some real-time application scenarios, these light-weight inference engines require time acceleration and low memory consumption. Paddle Lite is a well-known open-source inference engine that is fully functional. However, Paddle Lite only supports regular OS (e.g., Linux, Windows, and iOS), making it difficult to achieve time acceleration and low memory consumption for real-time application scenarios during inference. In this brief, we propose the Paddle Lite on Zephyr solution for inference acceleration in RTOS. We first propose a modular compilation method to incorporate the most basic functions of Paddle Lite. To address the system differences between RTOS and Linux, we resolve the system-level and compilation-level issues from modular compilation. We then load the Paddle Lite model into memory as a device when the system starts up. We further design an inference method that skips third-party libraries during inference and thus obtains the same inference results as Linux. We deploy the Paddle Lite on Zephyr and conduct experiments with seven classic Convolutional Neural Network (CNN) models on a single-core CPU. The experiment results show that the average inference time on Zephyr RTOS is reduced by 7%, and the average memory consumption is reduced by 78% compared to Linux. This work has merged an upstream branch of the Paddle Lite.

Over-The-Air (OTA) software updates are widely used in automotive embedded systems to remotely address software defects and vulnerabilities. However, the distribution of software packages is vulnerable to malicious attacks, posing severe security threats. Various cryptographic algorithms are used to secure automotive OTA software updates. However, existing secure OTA software updates rely on digital certificates for identity authentication. These digital certificates are often provided by third-party Certificate Authorities (CAs) and issued based on physical identifiers (e.g., Vehicle Identification Number (VIN), engine number, or Electronic Control Unit-ID (ECU-ID)), which are susceptible to illegal modification. Additionally, these secure OTA software updates fail to provide integrated security that encompasses authentication, confidentiality, integrity, access control, and data freshness. To tackle these existing drawbacks, we propose LigSecOTA, a lightweight OTA software update with integrated security based on a one-machine-one-certificate digital identity management system. The one-machine-one-certificate digital identity management system issues a unique and trusted digital certificate for each ECU based on bit time information instead of physical identifiers; these certificates are then used for ECU authentication. LigSecOTA ensures integrated security, including authentication, confidentiality, integrity, access control, and data freshness, through three processes: authentication, authorization, and package distribution. The authorization dy namically provides keys for the package distribution, significantly enhancing security. The security attributes of LigSecOTA are formally verified using the ProVerif tool. Finally, we evaluate LigSecOTA on the NXP LS1028A platform with an ARM Cortex A72 core. Experimental results demonstrate that LigSecOTA outperforms state-of-the-art secure OTA software updates in terms of computation and communication overhead, highlighting its lightweight nature.

The microcomputer cluster is a group of connected microcomputers that work together to perform as a single system. Unlike high-performance computer clusters, microcomputer clusters are designed to provide reliable and efficient services for safety-critical embedded systems, which usually require low SWaP (Size, Weight, and Power) because of the high stability and cost control requirements. Considering that safety-critical systems have strict real-time constraints (i.e., deadline constraints) and resource constraints, each microcomputer usually needs to run a Real-Time Operating System (RTOS) instead of Linux to achieve precise scheduling and control, and a high-speed real-time network such as Time-Triggered Ethernet (TTE) is required for intra-cluster communication. In microcomputer clusters, a load imbalance between microcomputers usually leads to system instability, and a lightweight application distribution framework automatically migrates applications among microcomputers, thereby breaking resource isolation and improving resource utilization. However, mainstream application distribution frameworks, such as Kubernetes (K8s), MicroK8s, and K3s, can be applied neither to RTOS nor to TTE. In this study, we design a lightweight application distribution framework with automated and real-time computing and communication (ARC2). ARC2 monitors the microcomputer cluster resource state in real-time and introduces a resource hierarchical pooling method to utilize cluster resources flexibly. It employs TTE for application distribution combined with a real-time scheduling strategy, achieving low end-to-end latency and load balancing. It simplifies the existing application distribution framework and introduces a low-complexity cluster management logic to achieve low resource overhead. We conduct experimental evaluations on a heterogeneous platform. The results show that: (1) the load imbalance is reduced by at least 59.81% compared to the original system; (2) the deviation in real-time monitoring traffic is reduced by an average of 56.7 ms, with the application distribution success rate reaching 100% and an average distribution time of 393.0 ms; and (3) the CPU, memory, and bandwidth overhead are 9%, 3 MB, and 0.104 Mb/s, respectively.

Kubernetes provides powerful container orchestration features, like auto-scaling, which dynamically adjusts the scale of containerized applications. However, the default auto scaling mechanism in Kubernetes typically responds to workload changes only after they have occurred, which can result in resource mismatches. While there has been significant research into proactive auto-scaling approaches, most existing solutions struggle to adapt to the constantly evolving characteristics of prediction targets. This paper presents PAHPA, an intelligent, prediction-assisted approach aimed at enhancing Kubernetes' autoscaling capabilities, which integrates an prediction model, SLMD-LightGBM proposed in this paper, featuring a self updating mechanism for continuous prediction optimization, queueing theory analysis to improve resource allocation decisions, and a correction mechanism that refines prediction metrics using real-time data. A central insight of this paper is that while predictions are crucial, they should not be the sole basis for decisions and must be complemented by real-time monitoring data to ensure robust and adaptive autoscaling. Experimental results demonstrate that PAHPA significantly enhances system stability and reduces service latency, achieving a 9.5% lower Violation Rate (16.3%) than HPA (25.8%) and a 63% reduction in 99th percentile latency (880ms vs. 2400ms). This research highlights how combining predictive analytics with real-time monitoring can lead to more effective autoscaling strategies in cloud-native environments.

Adopting Model-Based Development (MBD) in automotive software becomes necessary because it provides a rigorous development process. As the increase in the number of software components (SWCs) and their interactions, modifications to one part of the software might impact other parts due to the high coupling of SWCs. Developing an automated software refactoring technique to implement high cohesion and low coupling of software is necessary. Software refactoring usually contains code refactoring and architecture refactoring. Code refactoring only modifies the code inside the SWCs without changing its original functionality and external behavior, whereas current architecture refactoring does not consider the interaction weight (strength) between SWCs.In this study, we propose a weighted community division algorithm called Weighted-Girvan-Newman (W-GN) for software architecture refactoring. W-GN algorithm refactors the architecture by dividing SWCs into modules based on the interaction weights of SWCs. We further develop an automated architecture refactoring tool called AutoToolMD. This tool assists engineers in improving development efficiency and ensures the architecture aligns with the requirements of high cohesion and low coupling. Evaluations show that W-GN indicates more suitable modularity values than the traditional Girvan-Newman (GN) algorithm because the former can better reflect the real architecture with interaction weights. We apply AutoToolMD to automatically refactor architecture in automotive industry practice. Case study with the Zone_B PwrSplyMngt and Zone L_Lock modules in the Honda zone control software shows that AutoToolMD effectively refactors architecture with a significant improvement in testing efficiency and readability.

Hypervisor is a VMM (Virtual Machine Monitor) that creates and runs multiple VMs (Virtual Machines) through abstracting resources from a physical machine. Hypercall is a special and crucial call used in virtualized systems as it serves as a main communication channel between VMs and the hypervisor. However, hypercall attacks occur when an attacker manipulates the communication channel, and it could cause abnormal VM status, potentially leading to the abnormal resource allocation of the host OS (Operating System) and crash of VMs. Therefore, the virtualized system should execute abnormal VM status detection to identify potential abnormal behaviors to protect VMs and the host OS; however, existing works are either for reconstructing the hypervisor or hardware isolation, not for the VM status detection for abnormal hypercall.This study develops a hypercall-oriented abnormal VM status detection system called HypercallDetector based on the following three innovations: 1) we implement a hypercall tracing based on eBPF to obtain the hypercall-related running status (including CPU usage, memory usage, network traffic, etc.) of each VM; 2) we implement a window division technology to divide the VM status into multiple status windows of the same size, and appropriate window size with balanced detection precision (95.0%) and latency (within 8.8 ms) obtained by proposing the window regulator; and 3) we implement a CS-H algorithm (Compressing Sensing for Hypercall) to distinguish whether the VM status is abnormal. HypercallDetector shows higher precision and lower latency than its opponent and consumes only 8.6% CPU of single core and 0.3% memory usage when starting 240 VMs.

Control flow is the execution order of individual statements, instructions, or function calls within an imperative program. Malicious operation of control flow (e.g., tampering with normal function addresses) leads to severe consequences such as data leakage and system crash. Control Flow Integrity (CFI) is a defense restricting the execution order of program within Control Flow Graph (CFG). IndexHooks is an existing CFI solution designed against forward function calls tampering (including direct and indirect jump). This solution constructs a read-only linear function table that stores function addresses during compilation. Then, IndexHooks checks the table to make program jump to the correct target address during runtime. However, IndexHooks faces limitations in backtracking CFG construction, which can lead to excessive memory usage; the linear structure of the function table is vulnerable to brute force tampering. Addressing the limitations of IndexHooks, this study develops an obfuscated CFI solution called LeafHooks. LeafHooks is implemented during compilation by the LLVM compiler, which performs static analysis and instrumentation on the LLVM Intermediate Representation (IR) code of a program. We make the following three innovations: 1) we propose a speculation-free identification method for indirect function calls by linear traversing and analyzing codes to obtain legal function information (function address); 2) we save this information into a function table in the form of a Balanced Binary Tree (also known as AVL), enhancing the fuzzification of function addresses to defend against brute force; 3) we design a method to simulate control tamper attacks on ARM64 architecture to verify the ability of LeafHooks to protection. LeafHooks shows less overhead than state-of-the-art solutions and reduces 2.9% and 0.55% overhead on average using UnixBench and Phoronix, respectively.

Memory compression can reduce the size of the inactive data in the random access memory (RAM), thereby freeing up unused space and allowing more programs to run; however, current mainstream memory compression frameworks (e.g., Zram and Zswap) and algorithms (e.g., Zstd and Lz4) do not effectively solve the problem of increased CPU utilization, causing they cannot be directly applied to the resource-sensitive embedded operating system, that is, sensitive to both CPU utilization and memory usage. In this study, we develop a Zram instance pool framework called ZramPool for adaptive memory compression. The framework consists of the swap space with multiple Zram instances and the adaptive Zram compression module. Through introducing linear regression analysis, the number of Zram instances can be adaptively adjusted based on the size of the compressed data, allowing Zram instances to work in parallel to match the workload. In ZramPool, we achieve two different requirements of reducing CPU utilization while keeping compression speed and increasing compression speed while keeping CPU utilization. ZramPool is deployed in the embedded Linux OS with a 8GB memory size running on the ARMv8 architecture. For the first requirement, ZramPool can reduce CPU utilization by an average of 11.42% while the compression speed only decreases by an average of 2.4%. For the second requirement, ZramPool can increase compression speed by an average of 11.71% while the CPU utilization only increases by an average of 1.9%.

Time-sensitive networking (TSN), as a solution to the nondeterministic communication of traditional Ethernet, meets the real-time and deterministic communication requirements of intelligent automobiles. There are three traffic types in intelligent automobiles, including time-triggered (TT) flows, audio-video-bridging (AVB) flows, and best-effort (BE) flows, and TSN proposes the gate control list (GCL) to control the transmission of the above traffic. The current GCL synthesis usually serves the hard real-time TT flows but ignores the delay of non-TT flows; and it introduces guard bands to ensure the noninterference transmission of TT flows, inevitably wasting bandwidth. Therefore, this article proposes a design synthesis and optimization strategy to improve the transmission of AVB flows and bandwidth utilization while ensuring the real-time performance of TT flows. This strategy first adopts the initial time window design to allocate the antecedent time windows for AVB flows, then transmits AVB flows according to the deadline to enhance the scheduling of AVB flows, and finally flexibly adjusts the time windows of TT flows and AVB flows according to the size of AVB flows to improve bandwidth utilization. Experimental results show the effectiveness of the proposed strategy in improving the transmission of AVB flows and bandwidth utilization compared to the state-of-the-art methods.

System virtualization techniques are gradually applied to embedded systems with the performance improvement of embedded devices; however, there is a large time offset (i.e., deviation) of hundreds of ms between virtual machines (VMs) due to the drift of the virtualization abstraction layer and the jitter phenomenon. It is urgent to significantly reduce this offset by time synchronization techniques. Unfortunately, the current mainstream time synchronization software (e.g., Chrony and LinuxPTP) cannot be used in the embedded virtualized system connected by the fieldbus, such as controller area network (CAN); meanwhile, drift correction-based time synchronization techniques dedicated to CAN bus cannot be utilized for virtualized systems. In this study, we design a general vmPTP, which is a precise time protocol (PTP) for inter-VM communication in embedded virtualized systems based on Linux kernel-based VM (KVM). This is the first time synchronization work focused on embedded virtualized systems. We implement two vmPTP versions based on VirtIO and inter-VM shared memory (IVSHMEM) according to the four message (i.e., packet) exchanges of PTP. We propose an asymmetry compensation strategy to solve the problem of asymmetric rate of I/O operations in the message exchange process, which optimizes the offset computation. We further produce a convergence stopping approach which can continuously converge the offset until the offset is within the given bound and stop. We conduct experimental evaluations on both X86-64 and ARM64 architectures. For two versions of vmPTP, the experimental results show that: 1) the offsets are always within$1~{\mu }$s on two architectures; 2) the offsets are less than that of LinuxPTP and Chrony; and 3) the vmPTP’s CPU and memory utilization on the X86-64 architecture are merely 0.3% and 0.1%, respectively, whereas those on the ARM64 architecture are 3.8% and 0.1%, respectively. We experiment with vmPTP in real-time application and the result demonstrates that vmPTP is feasible and reliable in the real platform.

The co-verification of safety and security is a necessary process for safety- and security-critical distributed applications, but conflicts exist between safety and security. The state-of-the-art Block-based Vulnerability Pre-assignment (BVP) and Reversed Block-based Time Pre-assignment (RBTP) co-verification techniques of safety and security have three main limitations: 1) only co-verifying the boundary values and ignoring the verification of non-boundary values; 2) algorithm redundancy (i.e., BVP and RBTP must be used simultaneously) makes the verification process complex and cumbersome; and 3) only one safety attribute and one security attribute participate in the co-verification. In this study, we explore the causal mechanisms for the mutual influence between safety and security: 1) they compete with each other in relation to Worst Case Execution Time (WCET); 2) there is a lack of cooperation between the two; and 3) both are pursuing maximum performance for each individual. Above causal mechanisms precisely conforms to the problem of maximizing benefits in non-cooperative games (i.e., Nash equilibrium). Therefore, we propose the Fast Game Verification (FGV) based on non-cooperative game to co-verify reliability in safety and confidentiality in security. FGV achieves non-boundary value co-verification and avoids redundancy. We develop Fast Game Verification plus plus (FGV++) algorithm to co-verify multiple safety attributes and multiple security attributes. We conduct actual cases of distributed applications. In terms of the co-verification of two attributes, FGV demonstrates average acceptance rate of 59.96% within 0.638 s, surpassing both BVP&RBTP by 6.94% (within 0.812 s); FGV++ achieves average acceptance rate of 58.73% within 0.663 s, exhibiting a 4.53% advantage over BVP and RBTP. In the co-verification of four attributes, the average acceptance rate of FGV++ has increased to 61.07% within 1.34102 s.

The widespread use of locatable devices leads to a sharp increase in the storage of trajectory data, and redundant storage of similar trajectories wastes a large amount of storage resources. The state-of-the-art multiple trajectory compression algorithms are developed to strip the partial information of trajectory; however, these algorithms have low compression efficiency because they do not eliminate the redundancy within a single trajectory as much as possible, as well as high time overhead due to matching of reference sub-trajectories. In this study, we propose a new spatio-temporal trajectory compression technique, consisting ofintra-trajectory error balancingandinter-trajectory feature point clustering. Intra-trajectory error balancing is achieved through retaining high score (an aggregated metric) trajectory points (i.e. feature points). Furthermore, inter-trajectory feature point clustering realizes the fusion of similar trajectories and extracts the commonality between trajectories. Experiments are performed on five real trajectory datasets, including two road datasets, one airline dataset, and one walking dataset. Compared with the state-of-the-art methods, our compression technique improves the compression ratio by an average of 24.9% under the same error, and reduces the time overhead by at least an order of magnitude.

5G mobile communication techniques are widely applied in ubiquitous communication scenarios (e.g., smart navigation and smart transportation), which require time synchronization among mobile devices. However, the built-in time synchronization software of Android phones presents large time offsets with hundreds of milliseconds (ms), and the mainstream time synchronization techniques have specific limitations: 1) the Network Time Protocol (NTP) has too large offset to meet the real-time information interaction among mobile devices; 2) the Linux Precision Time Protocol (LinuxPTP) exists hardware dependence and cannot be implemented on Android and 5G networks; and 3) the Global Navigation Satellite System (GNSS) requires installing a hardware receiver on each mobile device. In this study, we develop a Mobile Precision Time Protocol (MobiPTP), which is hardware-independent and compatible with various network types, including Wide-Area Network (WAN), Local-Area Network (LAN), wired and wireless networks. The main challenges include signal strength instability and uplink-downlink asymmetry. We propose a dynamic time synchronization algorithm and an asymmetry compensation strategy to overcome these challenges. Regardless of high-speed mobile or crowded conditions in 5G networks, MobiPTP demonstrates an average offset of 9 ms, outperforming the NTP-based open-source software Chrony (about 30 ms). MobiPTP has been successfully deployed in multiple real-world ubiquitous communication scenarios and always demonstrates much lower offsets than Chrony.

Power consumption prediction is one of the keys to optimize the energy consumption of servers. Existing traditional regression-based methods are too simple and poorly generalized, while popular deep learning methods require too much data. Therefore, they are difficult to be widely generalized. In this study, we propose a framework of linear interpolation multi-head sparse temporal pattern attention (Li-MSA) based on few-shot learning for power consumption prediction of servers with small-scale datasets in environments such as cloud data centers or edge computing. First, the interpolation reconstruction module extends and smooths the data. Then, the embedding learning module is used to narrow the scope of the hypothesis space. Finally, the multi-head sparse temporal pattern attention module emphasizes features and predicts power consumption. The results of the experiments show that Li-MSA outperforms the best results among the other methods for two datasets with different time steps in the RMSE metric by 15.34%, 17.35%, 18.18%, 6.28%, 4.05%, 7.73%.

As promising industrial embedded networks, Controller Area Networks with Flexible Data-rate (CAN-FD) are widely used in time-sensitive domains, such as automotive networks. However, the absence of built-in security mechanisms in CAN-FD necessitates the development of security protection mechanisms. The existing Lightweight Authentication for Secure Automotive Networks (LASAN) framework focuses on enhancing the security of CAN/CAN-FD communication but neglects the conflict between security and delay. In this study, we conduct a thorough analysis of the causal mechanism related to the security and delay of LASAN and propose a static message scheduling method called Cooperative Swapping Approach (CSA) to achieve secure and low-delay CAN-FD communication. CSA is to minimize the end-to-end delay of precedence-constrained CAN-FD applications by swapping message positions in a valid message sequence. Nevertheless, exchanging message positions may impact the precedence dependencies between messages; therefore, we propose a novel Cooperative Transform Approach (CTA) within the CSA to efficiently preserve these precedence constraints. Valid message sequences with minimal end-to-end delays of a motivation example and an Adaptive Cruise Control (ACC) application are obtained in LASAN by CSA. These sequences are implemented on the embedded microcontroller platform of STM32H743IITs for evaluation. Experimental results show that our proposed CSA can effectively reduce the end-to-end delay of LASAN and outperform the state-of-the-art static message scheduling method in terms of low delay.

With the development of the automotive industry toward intelligence and automation, there is a trend of controller area network (CAN) migrating to CAN with flexible data-rate (CAN-FD), where frame packing (i.e., packing signals of various periods, deadlines, and payloads into frames following the standard CAN-FD format) is critical to address the high bandwidth demand with limited resources. Existing works have applied integer linear programming (ILP), which easily gets intractable as the number of signals to be packed increases, or proposed heuristics, which are not able to obtain the optimal solution. In addition, the security model employed does not meet the AUTOSAR SecOC specification. This article reports a novel frame-packing approach for CAN-FD with an AUTOSAR-compliant security model. We establish the theory that extending the existing frame to pack signals with the same period leads to shorter worst-case transmission time (WCTT) and thus lower bus utilization compared to creating a new frame. Following this principle, the design space is tremendously pruned, where the optimal solution is guaranteed to remain. With pruning, we are able to increase the optimally solvable size of the problem from 150 signals to 300 signals, which is sufficient for practical usage. When there are 300 signals, only 10−142 of the original design space needs to be explored. To further improve efficiency, we apply pruning to heuristics. When the signal size is 500, for simulated annealing (SA), the computation time can be reduced by 54.1% and the bus utilization can be saved by 10.5% with pruning being deployed. In addition, we propose the max–min ant system as an alternative, which achieves better bus utilization than SA in shorter computation. Our reported method is generally applicable to other CAN-based distributed networks demanding higher bandwidth as well, such as in industry automation.

Controller Area Network with Flexible Data-rate (CAN-FD) is a promising industrial embedded network because of its high bandwidth and long data field length. However, CAN-FD does not deploy any security protection mechanisms, leaving it vulnerable to network attacks. In recent years, authentication and authorization frameworks have often been deployed in industrial embedded networks (e.g., automotive networks) to provide secure CAN/CAN-FD communication. However, these frameworks cannot simultaneously enhance confidentiality, integrity, and availability; moreover, these frameworks are mainly based on a distributed security management mechanism, resulting in large computation, communication, and memory overhead. This paper proposes a trinity-enabled and lightweight security framework called TrinitySec based on cryptographic algorithms for CAN-FD communication. TrinitySec ensures the availability of ECU and CAN-FD messages through authentication and authorization, as well as the confidentiality and integrity of CAN-FD messages through a symmetric-key algorithm and Hash-based Message Authentication Code (HMAC) function. TrinitySec proposes a low-overhead centralized security management mechanism instead of the existing distributed management mechanism. We formally verify the security of TrinitySec using the ProVerif tool. We implement TrinitySec on STM32H743IIT Micro Controller Unit (MCU) with ARM Cortex M7 core and evaluate that TrinitySec outperforms other state-of-the-art security frameworks in terms of computation, communication, memory, and storage overhead.

Time-Sensitive Networking (TSN) realizes high bandwidth and time determinism for data transmission and thus becomes the crucial communication technology in time-critical systems. The Gate Control List (GCL) is used to control the transmission of different classes of traffic in TSN, including Time-Triggered (TT) flows, Audio-Video-Bridging (AVB) flows, and Best-Effort (BE) flows. Most studies focus on optimizing GCL synthesis by reserving the preceding time slots to serve TT flows with the strict delay requirement, but ignore the deadlines of non-TT flows and cause the large delay. Therefore, this paper proposes a comprehensive scheduling method to enhance the real-time scheduling of AVB flows while guaranteeing the time determinism of TT flows. This method first optimizes GCL synthesis to reserve the preceding time slots for AVB flows, and then introduces the Earliest Deadline First (EDF) method to further improve the transmission of AVB flows by considering their deadlines. Moreover, the worst-case delay (WCD) analysis method is proposed to verify the effectiveness of the proposed method. Experimental results show that the proposed method improves the transmission of AVB flows compared to the state-of-the-art methods.

The network architecture that Time-Sensitive Networking (TSN) is used as the backbone network and the Controller Area Network (CAN) serves as the intra-domain network is considered as the CAN-TSN interconnection network architecture, which has gained considerable attention within industrial embedded networks, such as spacecraft, intelligent automobiles, and factory automation. The architecture employs the CAN-TSN gateway as a central hub for transmitting and managing a significant volume of communications between the CAN domains and TSN. However, the CAN-TSN gateway faces a high congestion challenge due to the rapid growth in data volume, making it difficult to effectively support different time planning mechanisms provided by TSN. In this article, we propose a two-stage mixed-criticality traffic scheduler. The scheduler in the first stage adopts a Message Optimization Algorithm (MOA) to aggregate multiple CAN messages into a single TSN message (including the aggregation of critical and non-critical CAN messages), which reduces the number of CAN messages requiring transmission. In the second stage, the scheduler proposes a Message Scheduling Optimization Algorithm (MSOA) to schedule critical TSN messages. This algorithm reassembles all the critical CAN messages (within the un-schedulable TSN messages) to generate new TSN messages for rescheduling. Experimental results show that our proposed scheduler effectively improves the acceptance ratio of critical and non-critical CAN messages and outperforms the state-of-the-art message scheduling method in terms of acceptance ratio while improving the bandwidth utilization and the number of schedule table entries. We further construct a hardware platform to evaluate the performance of MSOA. The consistency between practical results and theoretical results shows the effectiveness of MSOA.

As an Ethernet-based communication protocol with timing determinism, TSN (time-sensitive networking) has become a well-recognized promising in-vehicle network solution for increasingly automated automobiles. To satisfy the reliability requirement of safety-critical applications, existing works towards fault-tolerant TSN trade too much bandwidth for redundancy, limiting their scope of applicability. Targeting mixed-critical traffic, which is widely found in practice, we define a shared fault-tolerant segment that is compatible with the TSN standard. It serves the critical flows when faults occur, to improve their reliability and serves the non-critical flows when otherwise, to improve their quality of service (QoS). On top of this, we propose a space-time redundancy scheduling algorithm, aiming to make the most efficient use of bandwidth, i.e., to fulfill both the reliability as well as hard real-time requirements, and maximize the QoS with the least bandwidth. In essence, we formulate a bi-objective design space exploration problem with hundreds of thousands of decision variables and solve it with customized heuristics. Experimental results show that compared to the state-of-the-art methods, our reported work increases the number of critical flows that can be accommodated on a resource-constrained network by 3 to 4 times, and achieve the highest QoS with an average reduction of 60.3% in bandwidth. As the first work along sharing of bandwidth between mixed-critical traffic in fault-tolerant TSN, this idea can be further pursued towards higher efficiency and may be applied in general autonomous systems.

Many embedded applications demand both resource efficiency and timing guarantee. However, resource sharing naturally complicates the analysis that extracts the worst-case scenario out of contention. Global Fixed-Priority (GFP) preemptive multiprocessor scheduling is one of the mainstream strategies to resolve contention on computational resources. It allows jobs of the same task to be executed on different processors, hence potentially enabling better parallelism and more efficient resource utilization. Unfortunately, its worst-case response time (WCRT) analysis is challenging. Existing approaches divide a high-priority task into three workloads, namely, carry-in workload, body workload, and carry-out workload, trying to optimize them individually. In this work, we propose a holistic WCRT analysis for GFP preemptive multiprocessor scheduling, where a task is no longer divided. Specifically, (i) we establish the tight interference scenario for the task being analyzed to find the most interfering high-priority jobs in any time interval; (ii) we obtain the starting released instant of each high-priority task’s first job to determine the maximum interference from high-priority tasks’ first jobs to the task being analyzed; (iii) we build the worst-case tight interference scenario for the task being analyzed by combining the tight interference scenario and the starting released instants; (iv) we prove that the WCRT of the task being analyzed can be decided by the worst-case tight interference scenario. Evaluation on schedulability shows that our proposed analysis achieves 4.2%-8.6% higher acceptance ratio in randomly generated data sets than the state-of-the-art workload division approaches.

Multiple processors system on chip (MPSoC) has been the trend in cyber-physical systems (CPSs), and reasonable partitioning for MPSoC resources is a critical step in CPSs design. The uncertainties of environment and time are both important factors that need to be considered in the design, but none of the previous work pays attention to two uncertainties at the same time. The state-of-the-art work presented a detailed process of applying uncertain programming to solve the partitioning problem, which provides a solution for designing in an uncertain environment. However, this work only considers the bipartition scenario which cannot be directly applied to MPSoC, and it does not focus specifically on time uncertainty. In this paper, we propose a method for modeling the MPSoC partitioning problem in an uncertain environment, with the time uncertainty concern. We present the uncertain model that can be applied to the multiple optional resources scenario. We build the optimization model with the objective of minimizing time, analyze two different cases of minimizing the uncertain time, and finally prove a unified deterministic model to solve. We come up with three algorithms, including the heuristic algorithm, the genetic algorithm, and the exact algorithm, and experiments show that the heuristic algorithm and the genetic algorithm can obtain good approximate solutions compared with the exact algorithm.

Virtual machines (VMs) have been increasingly deployed in real-time systems to enhance heterogeneous resource sharing. Despite being isolated for security and prevention of failure propagation, VMs need to communicate with each other to complete certain tasks jointly. A real-time inter-VM communication framework has been proposed based on VirtIO, which is in essence a mechanism of message passing with high latency and low scalability on data amount. In contrary, IVSHMEM implements inter-VM communication with shared memory, which is generally fast and large in throughput. Unfortunately, IVSHMEM does not resolve resource contention between flows and hence cannot be applied in real-time scenarios. In this work, we propose a real-time inter-VM communication framework RTISM built upon shared memory and IVSHMEM. RTISM provides priority-based scheduling and supports mixed-criticality flows. Worst-Case Response Time (WCRT) analysis is reported to bound the end-to-end communication delay and a Limited Priority Assignment (LPA) algorithm is developed to enhance schedulability. Experimental evaluation shows that (i) RTISM has about 4 times higher throughput than the VirtIO-based inter-VM communication framework; (ii) LPA improves schedulability by over 25% compared to the state-of-the-art; (iii) WCRT produces a tight bound.

With the advancement of intelligence and networked automotive, the domain-centralized architecture, which employs time sensitive networking (TSN) as the inter-domain backbone network and control area network with flexible data rate (CAN-FD) as the intra-domain network, has garnered significant attention. However, cross-domain end-to-end communication involves multiple components, and significant disparities between TSN and CAN-FD render response time analysis within domain-centralized architecture for mixed-critical traffic exceptionally complex. In this paper, we develop a cross-domain with TSN and CAN-FD end-to-end response time evaluation tool, which analyzes the response time of mixed-critical traffic under different design options segment by segment. We specifically analyze the waiting times of different messages in the domain control unit when faced with the design options of one-to-one and multi-to-one conversion of CAN-FD and TSN frames. The proposed evaluation tool can be easily extended to different design options to support more application scenarios. Theoretical computational analysis and real hardware measurements show the effectiveness of our tool.

Summary Parallelization is an optimization technique that is playing an increasingly vital role in software applications. Discovering the potential parallelism in sequential programs is of primary importance for parallelization. To this end, various tools have been created to obtain parallelizable targets by analyzing the dependencies in sequential programs. However, the majority are constructed based on manually designed dependence analysis rules. Consequently, they must follow some constraints, which limit the scope of their program analysis capability. Furthermore, constructing a dependency analysis rule is a complicated and highly sophisticated endeavor. In this study, we exploit the fact that neural network models can learn the potential features of programs to tackle the parallelism discovery task in an end‐to‐end manner. Specifically, we developed a multigraph learning architecture on top of multiple abstract code representations in a complementary manner. In the architecture, we equip code representations with different neural network models in a targeted manner, including a deep convolutional neural network for analyzing both control and data flows and a novel neural network for learning the abstract syntax trees. Experimental results obtained on a common parallelism discovery dataset indicate that the developed multigraph learning architecture can learn potential parallelism patterns in sequential programs with high accuracy and efficiency.

The network architecture with the controller area network (CAN) as the domain bus in most domains and time-sensitive networking (TSN) as the backbone network is called the CAN-TSN interconnection network architecture, which has been or will be employed in industrial embedded networks (e.g., automobiles, spacecraft, and factory automation). In this architecture, the CAN-TSN gateway acts as a transmission hub handling a large number of communications between the CAN domains and TSN. However, most commercial CAN-TSN gateways are highly integrated with low flexibility, such that they are hard to accommodate different time planning mechanisms from TSN. In addition, these CAN-TSN gateways suffer from high congestion when TSN frames are sent from the TSN side to a CAN domain (i.e., TSN-to-CAN transmission) because of at least 100 times in the transmission rate between CAN and TSN. In this study, we propose a high-flexibility CAN-TSN gateway, where the CAN side can be easily adapted to different bus protocols, and the TSN side can be easily adapted to different configurations. In the gateway, we develop a low-congestion TSN-to-CAN scheduler, which executes a maximum awaiting time (MAT)-based scheduling strategy to alleviate the congestion. Experiments on the prototype platform show the advantages of the proposed CAN-TSN gateway and the developed MAT-based scheduling strategy.

As a widely used industrial field bus, the controller area network (CAN) lacks security mechanisms (e.g., encryption and authentication) and is vulnerable to security attacks (e.g., masquerade). A fingerprint-based intrusion detection system (IDS) in CAN networks can detect masquerade attacks by scanning the unique clock signals of CAN devices. However, most state-of-the-art fingerprint-based IDSs commonly use an analog-to-digital converter module with a low frequency of 60 MHz to sample CAN signals, lowering the detection accuracy of fingerprint-based IDSs. In addition, almost all fingerprint-based IDSs are trained offline and then detected online, ignoring that system clock signals of hardware change over time, resulting in degraded detection performance. This paper proposes an online learning-enabled and fingerprint-based IDS (OFIDS) in CAN networks to increase the sampling frequency, shorten the detection response time, and increase the detection accuracy. OFIDS uses a high-speed comparator (i.e., TLV3501) and FPGA (i.e., Xilinx ZYNQ-7010) to sample the CAN_High signal, achieving a low sampling delay time of 4.5 ns and a high sampling frequency of 1 GHz. The self-adaptability of the backpropagation neural network is taken advantage of and used to train the OFIDS model with a detection accuracy of 99.9992%. OFIDS is deployed to a CAN network prototype with five CAN devices (i.e., two Arduino UNO boards and three STM32 microcontrollers) and a real vehicle. Experimental results show that OFIDS can achieve at least 99.99% detection accuracy within 0.18μs in a CAN network prototype and can achieve 98% detection accuracy in a real vehicle.

Intelligent connected vehicle is rapidly growing with the 5-G technology; the diversity of functional interfaces has significantly expanded the avenues of attack, making automotive controller area network (CAN) more vulnerable to cyberthreats. Automotive CAN network attacks are a direct threat to traffic safety, and in this study, we explore the use of intrusion detection techniques for mitigating cyberattacks. However, most automotive CAN network intrusion detection technologies are not capable of defending against sophisticated attacks, making it extremely challenging for detecting intrusions in practice. In this article, we propose a novel time interval conditional entropy method for detecting intrusions in automotive CAN networks. The time interval conditional entropy intrusion detection method is not susceptible to interference and is capable of detecting a variety of attacks. In our experiments, the conditional entropy values of regular communication messages are collected and utilized to distinguish and detect the attacks. The time interval conditional entropy detection method is implemented and evaluated in our controller area net-work bus (CAN-BUS) network platform. The experiments show that our method has higher detection accuracy and is easier to deploy compared to existing automotive CAN network intrusion detection methods.

With the deep integration of the Internet of Things (IoT) technology and the increase of computational power and memory, vehicles can also serve as the infrastructures for Intelligent Transportation System (ITS), e.g., as fog nodes. However, when connecting vehicles to the internet, alongside with the benefits it brings, it also opens many new challenges such as security attacks. Controller Area Network (CAN) is one of the main in-vehicle communication protocols in modern cars. Its lack of sender verification mechanism makes CAN particularly vulnerable to cyber-attacks including masquerade attack. Fingerprinting Electronic Control Units (ECUs) based on hardware characteristics has been proved feasible and effective on defending CAN buses. However, most state-of-the-art works exploited the supervised learning algorithm to identify the transmitter based on the signal characteristics. This makes the decision process hard to understand, and it also limits the deployment on proprietary CAN bus without prior knowledge. To solve this, we design a novel clock-skew-based approach capable of pinpointing the sender and detecting intrusion on proprietary CAN bus. We take a single CAN frame as the object for measurement, and adjust the measuring process such that our approach can be independent of the transmission time of frames. Based on the statistical analysis of data from real vehicles, we propose a novel box-plot algorithm based on score mechanism to filter the raw data. Finally, the clock skews are estimated and accumulated to build a linear model for representing the transmitter ECU. The evaluation results on one CAN prototype and two production vehicles show that our approach is able to well identify and differentiate ECUs on the bus without prior knowledge. The data processed by the proposed box-plot algorithm can describe the hardware characteristics of ECUs precisely. We also show the ability of our approach to protecting the CAN bus against the masquerade attack.

Large amounts of time series data are required to support data analysis at the edge in the end-edge-cloud Industrial Internet of Things (IIoT) architecture. Reducing the storage cost is one of the main challenges in edge data management due to the limited storage resource of edge nodes. The state-of-the-art data reduction method has a high time overhead and poor reduction efficiency for unstable data sets. To solve this problem, this study proposes a time-series data management framework that combines data partition and data compression techniques. For the data partition technique, we propose an adaptive selection strategy to integrate the access pattern of the application and the characteristics of the time series data, thereby improving the partition accuracy. For the data compression technique, we propose a compression scheme based on time series data segmentation by using the idea of divide and conquer; we further introduce a change point detection technique to improve the compression efficiency for unstable data sets. Experimental results obtained with three types of real industrial data sets show that our framework is significantly better than the state-of-the-art method in terms of compression ratio and time overhead.

Collaborative inference is a promising method for balancing the limited computational power of Internet of Things (IoT) devices with the huge computational demands of convolutional neural networks (CNNs). In this approach, a CNN is divided into multiple partitions and placed on multiple devices to run simultaneously. However, two major challenges are raised. (1) Computational latencies vary when the central processing unit (CPU) loads of devices are different. However, no suitable methods are available for accurately determining computation latencies on the basis of CPU utilization. (2) Existing methods partition a CNN model either vertically or horizontally. The granularity of these methods is extremely coarse and their accuracy is low. To address the aforementioned issues, this study proposes a distributed collaborative inference framework that supports a fine-grained partitioning scheme for CNN in heterogeneous devices (hereafter referred to as OfpCNN). First, the framework uses the layer latency prediction model based on floating-point operations and CPU load (FCPM) to accurately predict the computation latency of each layer of CNN in different devices. Subsequently, OfpCNN uses horizontal and vertical partitioning methods (HVPM) to partition the input feature maps and the structure of CNN respectively in accordance with network conditions and computing capacity, then assigns them to multiple devices for execution. The HVPM solution overall considers the execution position of the layer, parallelism, and location of devices responsible for data aggregation and distribution, which can consequently obtain more fine-grained partition schemes. Experimental results show that FCPM can achieve a minimum accuracy of 88% and HVPM can improve the inference speed by 1–2.54 times compared with other state-of-the-art methods.

This article investigates the reliability of a special cyber-physical system (CPS) with an unreliable service and a complex boundary behavior. A flat semi-dormant multicontroller (FSDMC) model is constructed on a special CPS named arbitrated networked control system (ANCS) with dual channels. In this study, the dual-channel ANCS is considered as a Markov repairable system, which integrates the binary state of physical device failure and the multistate of information flow. The FSDMC is modeled as anN/(d,c)-M/M/c/K/SMWVqueuing system with an unreliable service. A dual rate matrix method is proposed to solve the stationary distribution of the queuing system and obtain the closed-form matrix solution of the distribution. Based on the queuing model, an optimization model is established to minimize the proposed cost performance rate function. A particle swarm optimization algorithm is used to solve the optimization model and obtain the optimal values of the system parameters under stable conditions. The closed-form expression of the instantaneous availability of the FSDMC on the physical failure rate and repair rate of the controller is yielded iteratively. The linear relationship between system instantaneous failure rate and task instantaneous failure rate is expressed. The sensitivity of task failure rate to system parameters is analyzed. Several reliability metrics are used to evaluate system reliability and task reliability. Experiments are conducted in real application scenarios to compare the task reliability using redundancy technology and real parallel applications. Experiments show that the proposed reliability model can more effectively guarantee system reliability goals compared with its counterparts.

Controller area network with flexible data-rate (CAN-FD) has received great attention in automotive cyber–physical systems (ACPSs) due to its high bandwidth and long payload. However, CAN-FD adopts a broadcast message transmission mechanism and lacks security protection, making it extremely vulnerable to cyberattacks. CAN-FD message packing (packing signals into messages) with low bandwidth occupancy (utilization) under security constraints is the prerequisite for running intelligent applications in ACPS. In this work, we implement a two-stage CAN-FD message packing solution to reduce bandwidth utilization and improve signal acceptance rate under security constraints. The first stage solves the message packing problem of minimizing bus bandwidth utilization under security constraints. The second stage aims at improving the signal acceptance rate by repacking signals. Experimental results show that the first stage reduces average bus bandwidth utilization by 135% compared with the unpacking solution, and the second stage improves the average signal acceptance rate by 5% than existing advanced methods.

With the development of multiprocessor technology, multiple processors are increasingly used in embedded real-time systems. The parallelism of multiple processors makes the worst-case response time (WCRT) analysis of multiprocessor real-time systems complicated. In the widely used global fixed-priority (GFP) scheduling, some effective approximate WCRT analysis methods have been proposed. These methods mainly focus on optimizing overall procedure or carry-in workload and assume that the whole carry-out workload of a high-priority task cause interference on the analyzed job. However, through our careful observation of specific examples, the partial carry-out workload of a high-priority task and the analyzed job may be executed in parallel. In other words, the part of parallel carry-out workload of a high-priority task could not cause interference on the analyzed job. In this article, we propose an improved WCRT analysis method by optimizing carry-out interference estimation for GFP scheduling, resulting in a more accurate upper bound of WCRT than the recent advanced methods. Experimental results show that our proposed method is superior than the recent advanced methods in terms of the acceptance rate of the system.

Reliability requirement assurance is an important quality of service (QoS) for workflow execution in cloud-based services. For a workflow with a reliability requirement, the enough replication for redundancy minimization (ERRM) and quantitative fault-tolerance with minimum execution cost + (QFEC+) algorithms are state-of-the-art algorithms to reduce the redundancy and cost, respectively. In this work, we define the reliability increment ratio (RIR) and propose the redundancy minimization using RIR (R_RIR) algorithm. In addition, we introduce the geometric mean and propose the cost reduction using geometric mean (C_GM) algorithm based on redundancy minimization. Experimental results show the proposed R_RIR and C_GM algorithms are superior to state-of-the-art algorithms: (1) although both R_RIR and ERRM show the same redundancy results, R_RIR is proven to generate minimal redundancy, whereas ERRM cannot; (2) R_RIR only consumes a few seconds to achieve minimal redundancy for large-scale workflows, and it has much higher time efficiency than ERRM; and (3) C_GM generates less cost than QFEC+ in a large part of cases.

Automotive cyber-physical systems need to be rigorously checked and tested under various physical conditions. Automakers aim to improve development efficiency of the automotive cyber-physical systems in the fierce market competition. However, the actual development process suffers from the challenges of long development cycle and poor scalability. To tackle these challenges, this article develops a digital twinning based adaptive development environment for automotive cyber-physical systems, which addresses two critical problems: each physical entity (i.e., electronic control unit, component, test source, etc.) needs to clone a corresponding digital twin; digital twins and the physical entities need to interact closely. The first problem is addressed through proposing an integrated digital twinning clone flow. The second problem is addressed through developing a smart digital twinning board. Our case study with the automotive body control system demonstrates that the adaptive development environment achieves a high adaptability with short development cycle, low complexity, low cost, high scalability, and high flexibility, which meet various automotive cyber-physical design requirements during the development process.

Cyber-physical systems (CPSs) realize the automatic control of entities through computing systems and networks. Stability is an important factor in CPS for system upgrading and troubleshooting. Traditional analysis methods focus on simulation and formal analysis, which have two major limitations: first, the current state information of CPS is difficult to obtain; second, most CPS face the state space explosion problem. These problems can be avoided and a good analysis can be provided based on empirical data. The main work of this article is summarized as follows: first, a phase space reconstruction method is designed to divide the dataset into several subsequences with the same shape; second, we propose a stability analysis method based on correlation dimensions. Results indicate that the proposed approach can obtain a stable correlation dimension. CPS perform better if the correlation dimension is maintained within a certain range; otherwise, a destabilizing factor exists. The proposed stability analysis has less complexity and running time.

Reasonable partitioning is a critical issue for cyber-physical system (CPS) design. Traditional CPS partitioning methods run in a determined context and depend on the parameter pre-estimations, but they ignore the uncertainty of parameters and hardly consider reliability. The state-of-the-art work proposed an uncertainty theory based CPS partitioning method, which includes parameter uncertainty and reliability analysis, but it only considers linear uncertainty distributions for variables and ignores the uncertainty of reliability. In this paper, we propose an uncertainty theory based CPS partitioning method with uncertain reliability analysis. We convert the uncertain objective and constraint into determined forms; such conversion methods can be applied to all forms of uncertain variables, not just for linear. By applying uncertain reliability analysis in the uncertainty model, we for the first time include the uncertainty of reliability into the CPS partitioning, where the reliability enhancement algorithm is proposed. We study the performance of the reliability obtained through uncertain reliability analysis, and experimental results show that the system reliability with uncertainty does not change significantly with the growth of task module numbers.

High energy consumption is one of the biggest obstacles to the rapid development of computing systems, and reducing energy consumption is quite urgent and necessary for sustainable computing. Low-energy scheduling based on dynamic voltage and frequency scaling (DVFS) is one of the most commonly used energy optimization techniques. Recent survey works have reviewed some low-energy scheduling algorithms, but there is currently no systematic review in low-energyparallelscheduling algorithms. With the increasing complexity of function requirements, many parallel applications have been executed in various sustainable computing systems. In this paper, we survey recent advances in low-energy parallel scheduling algorithms according to three scheduling styles, namely: 1) energy-efficient parallel scheduling algorithms; 2) energy-aware parallel scheduling algorithms; and 3) energy-conscious parallel scheduling algorithms. Low-energy parallel scheduling algorithms basically involve five categories of 1) heuristic algorithms; 2) meta-heuristic algorithms; 3) integer programming algorithms; 4) machine learning algorithms; and 5) game theory algorithms. Further, we introduce the future trends in low-energy parallel scheduling algorithms from the perspectives of new requirements and future developments. By surveying the recent advances and introducing the future trends, we expect to provide researchers with a systematic reference and development directions in low-energy parallel scheduling for sustainable computing systems.

CAN-FD (CAN with flexible data rate) has been developed to support automated driving as a high-bandwidth version of the conventional CAN (controller area network) bus protocol. Due to the complexity of the emerging automotive functionalities, there exist dependencies between the tasks and thus also between the CAN-FD messages. The current industrial practice is that the same application has exactly the same message transmission flow (i.e., the same ordered sequence of messages to be transmitted) across all vehicles. This renders large-scale attacks possible and potentially leads to millions of vehicles to be recalled, as one vehicle being compromised exposes all the others. To address this issue, an application could have different (obfuscated) message flows on individual vehicles. The challenge is to find a large number of available flows (i.e., flows that respect dependencies and meet application deadlines) within short time. For this purpose, we propose a novel priority assignment approach, which assigns the ordered positions in a flow (named priorities) to the messages. It dynamically generates new valid flows (i.e., flows with only dependencies respected and deadlines not considered) by message swapping, instead of exploring all valid flows as in the existing approaches. We apply pruning through affix-matching to further enhance the efficiency. That is, the prefix, infix, and suffix are all matched when determining whether a certain flow should be discarded without evaluating its availability, aiming for lower false positive rate (FSR) and false negative rate (FNR) than adfix-matching (only prefix and suffix are matched) in the state-of-the-art approach. Experimental results show that the proposed approach dominates the state-of-the-art approach, in the number of available flows found (up to 79x) and time consumption (up to 200x), most notably when the proportion of available flows is small. This work is an important step for obfuscated priority assignment to be deployed on practical CAN-FD messages.

With the trend towards automated driving, Controller Area Network (CAN) is migrating to CAN with Flexible Data-Rate (CAN-FD), where frame packing (i.e., packing signals of various periods, deadlines, and payloads into frames following the standard CAN- FD format) is critical to address the high bandwidth demand with limited resources. Existing works have applied Integer Linear Programming (ILP), which easily gets intractable as the number of signals to be packed increases, or proposed heuristics, which are not able to obtain the optimal solution. In addition, the security model employed does not meet the AUTOSAR SecOC specification. This paper reports a novel frame packing approach for CAN-FD with an AUTOSAR-compliant security model. We establish the theory that extending the existing frame to pack signals with the same period leads to shorter WCTT (worst-case transmission time) and thus lower bus utilization compared to creating a new frame. Following this principle, the design space is tremendously pruned. As shown in the comprehensive experiments, only 10−9 of the original size or even a smaller portion needs to be explored, while the optimality is kept. The computational time is correspondingly reduced, generating solutions within 15 minutes to large-scale problems that are otherwise intractable with ILP.

There is a demand of high bandwidth in the emerging real-time applications, such as autonomous vehicles, robotics, and industrial automation, where time-sensitive networking (TSN) is a promising solution. According to IEEE 802.1, a port in a TSN switch has eight prioritized FIFO (first-in first-out) queues, whose gates are opened or closed following a gate control list (GCL). Most of the existing works use one TT (time-triggered) queue for the hard real-time traffic, i.e., traffic flows with hard deadlines, which easily achieves timing determinism through GCL. Unfortunately, as a rigid mechanism, GCL is not able to handle timing jitter. In this work, we propose a hybrid strategy towards robust TSN. GCL is applied to only one queue named TT T1 for a small number of hard real-time flows with negligible jitter. The remaining flows with hard deadlines are allocated to a prioritized queue named TT T2 without GCL. Similarly, GCL is removed from all other queues handling AVB (audio-video-bridging) flows with soft deadlines and BE (best-effort) flows with no deadlines. Two analyses are proposed to obtain delay bounds for the TT T2 flows and periodic AVB flows, respectively, with interference from TT T1. Although safety is not compromised if the periodic AVB flows miss their deadlines, it is often desirable in practice to satisfy them for quality of service. In order to strike a balance, contention between the AVB queues is resolved with credit values on top of priorities. Experiments support that the delay bounds for the TT T2 and AVB flows are safe. In addition, changing the credit function can lead to different delay bounds of AVB flows, which is valuable for real-world configurations of TSN.

The CAN (Controller Area Network) signals transmitted in vehicles have great analytical value with the quick development of complex automotive software. The boom in big data creates an opportunity to transmit CAN signals from the in-vehicle network to the big data cloud platform, through which the signal analysis can be conducted. The signals are transmitted from the in-vehicle network to TelematicsBOX via CAN bus and then sent to the big data cloud platform. When using the CAN bus for signal transmission of the in-vehicle network, signals larger than 1 byte need to be unpacked into several 1-byte signals. The general solution of automotive software manufacturers usually uses the model-based development method to unpack the CAN signals, but such method is inefficient. To solve this problem, we develop a CAN signal unpacking tool called AutoToolCSU, which is based on a configured template through a GUI (Graphical User Interface). Compared to the model-based development method, AutoToolCSU not only greatly improves the development efficiency of CAN signal unpacking but also interfaces with the standard development processes of automotive software manufacturers.

Abstract Automotive software systems have become increasingly complex and huge, leading to long development cycle and increased development difficulty. When a complete automotive software project has reached a scale of several gigabytes, the complicated development process is prone to produce the following two irregular problems: (1) variable inconsistency problem and (2) code coexistence problem. These irregular problems may eventually lead to serious consequences, such as car crashes. In response to the above irregular problems, we develop a variable consistency check tool called AutoToolVCC for automotive software projects. AutoToolVCC divides the variable consistency check process into two stages: (1) extracting all variable information from the automotive software project and (2) checking the consistency of the variables through the variable preprocessing technique and the variable attribute check technique. After an actual check of multiple automotive software projects (approximately 500–1000 MB in size) provided by an automotive manufacturer, the accuracy of variable consistency check is as high as 100%, and the check time only takes about 10–30 s, whereas the pervious plain method needs 100–600 s.

Emerging cyber-physical systems (CPSs), such as in the domains of automotive, robotics, and industrial automation, often run complex functions with different criticality levels on a heterogeneous and distributed architecture. The ever stronger interactions between the cyber components and the physical environment lead to dynamic and irregular release of these functions. This article investigates dynamic scheduling of such mixed-criticality functions, where each function is modeled by a directed acyclic graph with no assumption on its period or minimum interarrival time. Unlike the existing methods that passively address the mixed criticality with a remedy when deadline misses are observed-this results in a high deadline miss ratio (DMR), and it is particularly undesirable for the high-criticality functions-we propose a novel dynamic scheduling approach using active strategies (ASDYS in short), where the mixed criticality is actively treated throughout the scheduling process. Automotive CPSs are used as an example for illustration. Experimental results show that our approach is significantly better than the existing methods in both the DMR of high-criticality functions and the overall system DMR.

As an essential part of Internet of Things, monocular depth estimation (MDE) predicts dense depth maps from a single red-green-blue (RGB) image captured by monocular cameras. Past MDE methods almost focus on improving accuracy at the cost of increased latency, power consumption, and computational complexity, failing to balance accuracy and efficiency. Additionally, when speeding up depth estimation algorithms, researchers commonly ignore their adaptation to different hardware architectures on edge devices. This article aims to solve these challenges. First, we design an efficient MDE model for precise depth sensing on edge devices. Second, We employ a reinforcement learning algorithm and automatically prune redundant channels of MDE by finding a relatively optimal pruning policy. The pruning approach lowers model runtime and power consumption with little loss of accuracy through achieving a target pruning ratio. Finally, we accelerate the pruned MDE while adapting it to different hardware architectures with a compilation optimization method. The compilation optimization further reduces model runtime by an order of magnitude on hardware architectures. Extensive experiments confirm that our methods are effective for images of different sizes on two public datasets. The pruned and optimized MDE achieves promising depth sensing with a better tradeoff among model runtime, accuracy, computational complexity, and power consumption than the state of the arts on different hardware architectures.

Vehicle design has entered a new stage, namely, Software Defined Vehicles (SDV), where functional safety is required to be guaranteed for risk control, and development cost needs to be optimized for profit maximization. This paper targets to optimize the development cost under the functional safety requirement for a safety-aware SDV, based on the automotive safety integrity level (ASIL) decomposition defined in ISO 26262. For this, a two-stage solution is proposed, which includes functional safety risk assessment and development cost optimization. The first stage develops a new fast risk assessment (FRA) algorithm to assess the functional safety risk, including the joint reliability risk and the real-time risk, of the SDV functionality. The second stage proposes a dual requirement guarantee (DRG) algorithm to optimize the development cost considering reliability and real-time requirements jointly. Our experiments demonstrate that the proposed two-stage solution guarantees the functional safety requirement while reducing the development cost by 20%-24%.

Controller Area Network with Flexible Data-rate (CAN FD) is beneficial for the in-vehicle communication of Internet of Connected Vehicles (IoCVs) because of its high bandwidth and data field length. However, CAN FD lacks a security authentication mechanism, making it extremely vulnerable to masquerade attacks. This study proposes the security enhancement for a real-time parallel in-vehicle application adopting a two-stage method. The first stage obtains the lower bound of an in-vehicle application by quickly abandoning most of sequences, while the second stage enhances security by adding Message Authentication Codes (MACs) to messages taking advantage of the laxity interval from the lower bound to the deadline. Experiments with an example and the adaptive cruise control in-vehicle application show the advantage of the proposed two-stage method in increasing the total byte size of MACs.

With the rapid development of Internet of vehicles, connected vehicles, autonomous vehicles, and autonomous driving technologies, automotive Controller Area Networks (CAN) have suffered from numerous security threats. Deep learning models are the current mainstream intrusion detection techniques for threat analysis, and the state-of-the-art intrusion detection technique introduces the Generative Adversarial Networks (GAN) model to generate usable attacked samples to supplement the training samples, but it exists the limitations of rough CAN message block construction and fails to detect the data tampering threat. Based on the CAN communication matrix defined by the automotive Original Equipment Manufacturer (OEM) for a vehicle model, we propose an enhanced deep learning GAN model with elaborate CAN message blocks and the enhanced GAN discriminator. The elaborate CAN message blocks in the training samples can precisely reflect the real generated CAN message blocks in the detection phase. The GAN discriminator can detect whether each message has suffered from the data tampering threat. Experimental results illustrate that the enhanced deep learning GAN model has higher detection accuracy, recall, and F1 scores than the state-of-the-art deep learning GAN model under various attacks and threats.

With Internet of things technologies, billions of embedded devices, including smart gateways, smart phones, and mobile robots, are connected and deeply integrated. Almost all these embedded devices are battery-constrained and energy-limited systems. In recent years, several works used energy pre-assignment techniques to study the dynamic energy-constrained scheduling of a parallel application in heterogeneous multicore embedded systems. However, the existing energy pre-assignment techniques cannot satisfy the actual energy constraint, because it is the joint constraint on dynamic energy and static energy. Further, the modeling and verification of these works are based on the simulations, which have not been verified in real embedded devices. This study aims to propose a dynamic and static energy-constrained scheduling framework in heterogeneous multicore embedded devices. Solving this problem can utilize existing energy pre-assignment techniques, but it requires a deeply integrated design flow and methodology. The design flow consists of four processes: (1) power and energy modeling; (2) power parameter measurement; (3) basic framework design including energy pre-assignment; and (4) framework optimization. Each design flow has corresponding design methodology. Both our theoretical analysis and practical verification using the low-power ODROID-XU4 device confirm the effectiveness of the proposed framework.

Co-verification of reliability and confidentiality is a necessary process for safety- and security-critical applications. While these two objectives are conflicting, preassignment has emerged as an effective and efficient verification solution. In this article, we propose two preassignment-based co-verification techniques, namely, Blocks-based Vulnerability Preassignment (BVP) and Reversed Blocks-based Time Preassignment (RBTP) for a parallel application in distributed CAN FD systems. BVP can significantly improve reliability under a vulnerability bound, while RBTP can reduce vulnerability over a reliability goal. Real case study with the parallel automotive application and parallelism study with two structures of high-parallelism and low-parallelism applications are demonstrated; the proposed BVP and RBTP can improve the verification acceptance ratio by 19 and 10 percent compared to the state-of-the-art Average Vulnerability Preassignment (AVP) and Average Time Preassignment (ATP) techniques, respectively.

There is a demand in the automotive industry to connect two CAN-based subsystems. The commercial CAN-CAN gateway supports basic message forwarding with no real-time behavior. To address this issue, a new gateway architecture is described, on which we present a novel worst-case latency analysis. Specifically, we bound the arrival of the messages at the gateway, which is then used by the Pointer Reachability Exploration (PRE) to derive the interfering message jobs. Our analysis computes a safe gateway latency tighter than the conventional one applied in CAN. Furthermore, we propose a Targeted Priority Assignment (TPA) algorithm that targets at the priorities assigned at the CAN bus and runs a reordering at the gateway to enhance the schedulability. TPA performs better than DMPO (Deadline Monotonic Priority Ordering), while OPA (Audsley's Optimal Priority Assignment) cannot be applied in this context. Evaluation over real-life and scalable CAN message sets is conducted. The reported analysis and priority assignment algorithm are developed for dynamic use to improve the acceptance ratio and can also be deployed statically to provide timing guarantees. This work can be easily extended to support multiple CAN subsystems.

Millions of automobiles with the same model could be recalled due to a cascading effect if attackers acquire the execution flow of an automotive application. To mitigate the scaling across effects induced by attacks, several security-aware obfuscated priority assignments have been proposed recently. Although these techniques can handle low-payload controller area network (CAN) messages in a nonparallel automotive application, they are unsuitable for the next generation high-bandwidth in-vehicle network architecture and parallel execution of complex safety-critical applications. In this article, we develop a new security-aware obfuscated priority assignment approach which explores CAN with flexible data-rate (CAN FD) messages in a parallel automotive application. Specifically, we propose a fast sequence pruning (FSP) technique for exploring head-based sequence pruning (HSP) and tail-based sequence pruning (TSP). Experiments with real-life parallel automotive application show that FSP can efficiently obtain millions of obfuscated priority assignments, which significantly mitigates the scaling across effects.

Reliability requirement is one of the most important quality of services (QoS) and should be satisfied for a reliable workflow in cloud computing. Primary-backup replication is an important software fault-tolerant technique used to satisfy reliability requirement. Recent works studied quantitative fault-tolerant scheduling to reduce execution cost by minimizing the number of replicas while satisfying the reliability requirement of a workflow on heterogeneous infrastructure as a service (IaaS) clouds. However, a minimum number of replicas does not necessarily lead to the minimum execution cost and shortest schedule length in a heterogeneous IaaS cloud. In this study, we propose the quantitative fault-tolerant scheduling algorithms QFEC and QFEC+ with minimum execution costs and QFSL and QFSL+ with shortest schedule lengths while satisfing the reliability requirements of workflows. Extensive experimental results show that (1) compared with the state-of-the-art algorithms, the proposed algorithms achieve less execution cost and shorter schedule length, although the number of replicas are not minimum; (2) QFEC and QFEC+ are designed to reduce execution cost, and QFEC+ is better than QFEC for all low-parallelism and high-parallelism workflows; and (3) QFSL and QFSL+ are designed to decrease schedule length, and QFSL+ is better than QFSL for all low-parallelism and high-parallelism workflows.

Guaranteeing safety is always a prerequisite in the process of realizing various automotive applications. However, the automotive functional safety design has been challenged by multiple factors, such as the complexity of the new generation automotive electrical and electronic (E/E) architecture, the continuous release and update of automotive functional safety standard International Standardization Organization (ISO) 26262, the release of new AUTOSAR adaptive platform standard, and the increase in different types of costs. In this article, we summarize the recent advances of automotive functional safety design methodologies through analysis, design, optimization, and runtime phases, respectively: 1) functional safety analysis; 2) functional safety guarantee; 3) safety-aware cost optimization; and 4) safety-critical multifunctional scheduling. Then, we provide the future trends in functional safety design methodologies that will be directly oriented to autonomous vehicles and adapt to the next generation functional safety standard ISO 21448.

To realize the optimized design of the automotive cyber-physical system, it is required to consider the interplay between the communication and computation. However, the existing research about the design of the controller area network (CAN) with flexible data rate (CAN FD) ignores this, it only considers the minimization of the bandwidth utilization and neglects the fact that it would trigger too many unnecessary message receiving interrupts (MRIs) on message receiving electronic control units. To address this problem, this article formulates a tradeoff problem that balances the bandwidth utilization and the number of unnecessary MRIs during the design of the CAN FD. We first propose an algorithm to analyze the number of unnecessary MRIs triggered by the packed messages, and then, two heuristic algorithms, namely, the Top-Down approach and the Hybrid approach, are proposed to resolve the tradeoff problem for midsized and large signal sets, respectively. The experiment results show that compared with the state-of-the-art algorithm, the Top-Down approach reduces the unnecessary MRIs by 10.48%-99.89% with only 0.02%-1.32% bandwidth utilization overhead, the Hybrid approach reduces the unnecessary MRIs by 23.15%-99.63% with only 0.13%-2.07% bandwidth utilization overhead.

The development of the complexity and connectivity of modern automobiles has caused a massive rise in the security risks of in-vehicle networks (IVNs). Nevertheless, existing IVN designs (e.g., controller area network) lack cybersecurity consideration. Intrusion detection, an effective method for defending against cyberattacks on IVNs while providing functional safety and real-time communication guarantees, aims to address this issue. Therefore, the necessity of its research has risen. In this paper, an IVN environment is introduced, and the constraints and characteristics of an intrusion detection system (IDS) design for IVNs are presented. A survey of the proposed IDS designs for the IVNs is conducted, and the corresponding drawbacks are highlighted. Various optimization objectives are considered and comprehensively compared. Lastly, the trend, open issues, and emerging research directions are described.

In distributed automotive embedded systems, safety issues run through the entire life cycle, and safety mechanisms for error handling are desirable for risk control. This article focuses on safety enhancement (i.e., safety mechanisms for error handling) for a safety-critical automotive application within its deadline. A stable stopping approach used for safety enhancement for an automotive application is proposed based on the static recovery mechanism provided in ISO 26262. The Stable Stopping-based Safety Enhancement (SSSE) approach is proposed by combining known backward recovery, proposed forward recovery, and proposed forward-and-backward recovery through primary-backup repetition. The stable stopping (i.e., SSSE) approach is a convergence algorithm, which means that when the reliability value reaches a steady state and the algorithm can stop. Experimental results reveal that the exposure level defined in ISO 26262 drops from E3 to E1 after using SSSE, and such improvement enables a safety guarantee of higher level.

Reliability is widely identified as an increasingly relevant issue in heterogeneous service-oriented systems because processor failure affects the quality of service to users. Replication-based fault-tolerance is a common approach to satisfy application's reliability requirement. This study solves the problem of minimizing redundancy to satisfy reliability requirement for a directed acyclic graph (DAG)-based parallel application on heterogeneous service-oriented systems. We first propose the enough replication for redundancy minimization (ERRM) algorithm to satisfy application's reliability requirement, and then propose heuristic replication for redundancy minimization (HRRM) to satisfy application's reliability requirement with low time complexity. Experimental results on real and randomly generated parallel applications at different scales, parallelism, and heterogeneity verify that ERRM can generate least redundancy followed by HRRM, and the state-of-the-art MaxRe and RR algorithm. In addition, HRRM implements approximate minimum redundancy with a short computation time.

Multiprocessor platforms have been widely applied in safety-critical domains to accommodate the increasing computation requirement of modern real-time applications. In this paper, we present a workload-aware harmonic partitioned multiprocessor scheduling scheme for periodic real-time tasks with constrained deadlines under the fixed-priority preemptive scheduling policy. In particular, two grouping metrics effectively integrating both harmonicity and workload characteristic are designed to guide our task partition. With those metrics, our scheme can greatly improve system utilization by taking advantage of the combination of harmonic relationship exploration and workload awareness. Experiments show that our proposed scheme significantly outperforms existing approaches in terms of schedulability.

We study the worst case response time (WCRT) analysis and evaluation for sporadic message-processing tasks in a multicore automotive gateway of a controller area network (CAN) cluster. We first build a multicore automotive gateway on CAN clusters. Two WCRT analysis methods for message-processing tasks in the multicore gateway are subsequently presented based on global and partitioned scheduling paradigms. We evaluate the WCRT results of two analysis methods with real message sets provided by the automaker, and present the design optimization guide.

The functional safety research for automotive cyber-physical systems (ACPS) has been studied in recent years; however, these studies merely consider the change in the exposure of the functional safety classification and assume that the driver’s controllability in the functional safety classification is always fixed and uncontrollable. In fact, the driver’s controllability is variable during the runtime phase, such that the execution process of safety-critical automotive functions is a human-interaction-aware process between the driver and ACPS. To adapt to the changes in the driver’s controllability, this article studies the human-interaction-aware adaptive functional safety processing for multi-functional ACPS in two main phases. In the design phase, where the driver’s controllability is fixed at the highest level (i.e., C3), we obtain the approximate optimal priority sequence of safety-critical functions without exhausting all sequences by proposing the refined exploration method. In the runtime phase, where the driver’s controllability level is variable (i.e., C0, C1, C2, or C3), we propose the human-interaction-aware task remapping method to autonomously respond to the change of the driver’s controllability. Examples and experiments confirm that the proposed adaptive functional safety processing can reduce overall task redundancy of safety-critical automotive functions while meeting their functional safety requirements, shorten the overall response time of safety-critical automotive functions, and increase the slack time for non-safety-critical automotive functions.

Automotive functional safety standard ISO 26262 aims to avoid unreasonable risks due to systematic failures and random hardware failures caused by malfunctioning behavior. Automotive functions involve distributed end-to-end computation in automotive cyber-physical systems (ACPSs). The automotive industry is highly cost-sensitive to the mass market. This study presents a resource-cost-aware fault-tolerant design methodology for end-to-end functional safety computation on ACPSs. The proposed design methodology involves early functional safety requirement verification and late resource cost design optimization. We first propose the functional safety requirement verification (FSRV) method to verify the functional safety requirement consisting of reliability and response time requirements of the distributed automotive function during the early design phase. We then propose the resource-cost-aware fault-tolerant optimization (RCFO) method to reduce the resource cost while satisfying the functional safety requirement of the function during the late design phase. Finally, we perform experiments with real-life automotive and synthetic automotive functions. Findings reveal that the proposed RCFO and VFSR methods demonstrate satisfactory resource cost reduction compared with other methods while satisfying the functional safety requirement.

A typical automotive integrated architecture is a controller area network (CAN) cluster integrated by a central gateway. This study proposes a novel and exact worst-case response time (WCRT) analysis method for message-processing tasks in the gateway. We first propose a round search method to obtain lower bound on response time (LBRT) and upper bound on response time (UBRT), respectively. We then obtain the exact WCRT belonging to the scope of the LBRT and UBRT with an effective non-exhaustive exploration. Experimental results on a real CAN message set reveal that the proposed exact analysis method can reduce 99.99999% combinations on large-scale CAN clusters.

The controller area network with flexible data-rate (CAN FD) is the new generation of the CAN technology to meet the daily increasing bandwidth requirement for automotive cyber-physical systems (ACPS). However, ACPS is a security-critical system, an efficient security/timing-aware design space exploration (DSE) method is required to fully utilize CAN FD's high data phase data rate. In this paper, we propose an AUTOSAR-compliant system model that integrates both timing and security constraint, an integrated mixed-integer linear programming formulation (i-MILP) for the optimal DSE of CAN FD, and a divide-and-conquer approach to the i-MILP (dc-MILP) to address its timing complexity problem. The experiment results show that dc-MILP scales well for industrial-size systems and saves 1.94%-4.76% bandwidth utilization and guarantees the schedulability for more signal sets by comparing with the state-of-the-art algorithm.

With the development of Internet of Things, the Healthcare Industrial IoT has become an effective way to curb the high mortality rate of heart disease. The accuracy of such system is mainly rely on the quality of ECG signals, in which noise reduction has been widely used. However, in the IoT environment, many kinds of noise which cannot be predicted in advance exist in signals, and make the signal morphology seriously damaged, which brings great challenge to the existing de-noise methods. By considering the self-adaptation and self-learning of deep neural network, we have proposed a multilayer LSTM model to the noise reduction of dynamic ECGs. Unlike other methods, our model makes both noise and ECG signals as part of time-series data, while other methods always consider them separately. Benefit from the recurrent structure of LSTM model, the most representative features will be extracted in LSTM memory units. By stacking multiple layers per time step, the useful information will be continuously refined and the noise signal will be discarded. Even if the ECG signals comprise many kinds of noise simultaneously, the model can still restore ECG signals with high quality without relying on threshold or signal quality. The experimental results show that the proposed model is insensitive to noise and the improvement of signal-to-noise ratio up to 55dB. This result is much better than the existing methods, which indicates LSTM is a new competitive method for ECG noise reduction.

Summary Modern software development for services computing and cloud computing software systems is no longer based on a single database but on existing multidatabases and this convergence needs new software architecture and framework design. Most current popular frameworks are not designed for multidatabases, and many practical problems in development arise. This study designs and implements a software development framework called Java data access service (JDAS) for multidatabases using the object‐oriented programming language Java. The JDAS framework solves related problems that arise when other frameworks are employed in practical software development with multidatabases by presenting and introducing design methods. JDAS consists of the modules of the database abstract, object relational mapping, connection pools management, configuration management, data access service, and inversion of control. Results and case study reveal that the JDAS framework effectively reduces development complexity and improves development efficiency of the software systems with multidatabases. Copyright © 2017 John Wiley & Sons, Ltd.

Industrial embedded systems are cost sensitive, and hardware cost of industrial production should be reduced for high profit. The functional safety requirement must be satisfied according to industrial functional safety standards. This study proposes three hardware cost optimization algorithms for functional safety-critical parallel applications on heterogeneous distributed embedded systems during the design phase. The explorative hardware cost optimization (EHCO), enhanced EHCO (EEHCO), and simplified EEHCO (SEEHCO) algorithms are proposed step by step. Experimental results reveal that EEHCO can obtain minimum hardware cost, whereas SEEHCO is efficient for large-scale parallel applications compared with the existing algorithms.

Automotive cyber-physical systems are energy-aware and safety-critical systems where energy consumption should be controlled from a perspective of design constraints and reliability should be enhanced toward functional safety goal assurance. In this paper, we solve the problem of reliability enhancement of an automotive function (i.e., functionality or application) under energy and response-time constraints based on the dynamic voltage and frequency scaling technique. The problem is solved by a two-stage solution, namely, response-time reduction under energy constraint and reliability enhancement under energy and response-time constraints. The first stage is solved by proposing average energy preallocation, and the second stage is solved by proposing a reliability-enhancement technique based on the first stage. Examples and experiments show that the proposed solution can not only assure energy and response-time constraints, but also enhances reliability as much as 16.66% compared with its counterpart.

Automotive functional safety requirement includes response time and reliability requirements learning from the functional safety standard ISO 26262. These two requirements must be simultaneously satisfied to assure automotive functional safety requirement. However, increasing reliability increases the response time intuitively. This study proposes a method to find the solution with the minimum response time while assuring reliability requirement. Pre-assigning reliability values to unassigned tasks by transferring the reliability requirement of the function to each task is a useful reliability requirement assurance approach proposed in recent years. However, the pre-assigned reliability values in state-of-the-art studies have unbalanced distribution of the reliability of all tasks, thereby resulting in a limited reduction in response time. This study presents the geometric mean-based non-fault-tolerant reliability pre-assignment (GMNRP) and geometric mean-based fault-tolerant reliability pre-assignment (GMFRP) approaches, in which geometric mean-based reliability values are pre-assigned to unassigned tasks. Geometric mean can make the pre-assigned reliability values of unassigned tasks to the central tendency, such that it can distribute the reliability requirements in a more balanced way. Experimental results show that GMNRP and GMFRP can effectively reduce the response time compared with their individual state-of-the-art counterparts.

ISO 26262 is a functional safety standard specifically made for automotive systems, in which the automotive safety integrity level (ASIL) is the representation of the criticality level. Recently, most studies have used ASIL decomposition to reduce the development cost of automotive functions. However, these studies have not paid special attention to the problem that the reliability goal may not be satisfied when ASIL decomposition is performed. In this study, we solve the problem of minimizing the development cost of a distributed automotive function while satisfying its reliability goal during the design phase by presenting two heuristic algorithms, reliabilitycalculation of scheme (RCS) and minimizing development cost with reliability goal (MDCRG). We first use RCS to calculate the reliability value of each ASIL decomposition scheme; then, the MDCRG is used to select the scheme with the minimum development cost while satisfying the reliability goal. Real-life benchmark and simulated functions based on real parameter values are used in experiments, and results show the effectiveness of the proposed algorithms.

Dynamic voltage and frequency scaling (DVFS) is a well-known energy consumption optimization technique in embedded systems and dynamically scaling down the voltage of a chip has been developed to achieve energy-efficient optimization. However, this operation may lead to a sharp rise in transient failures of processors and consequently weaken the reliability of systems. Reliability goal is an important functional safety requirement and must be satisfied for safety-critical applications. In this study, we aim to implement energy-efficient fault-tolerant scheduling for a reliable parallel application on heterogeneous distributed embedded systems, where the parallel application is described by a directed acyclic graph (DAG). An energy-efficient scheduling with a reliability goal (ESRG) algorithm is presented to reduce the energy consumption while satisfying the reliability goal for the parallel application. Considering that the application's reliability goal is unreachable if its reliability goal exceeds a certain threshold via ESRG, we further propose an energy-efficient fault-tolerant scheduling with a reliability goal (EFSRG) algorithm to reduce the energy consumption while satisfying the reliability goal based on an active replication scheme. Experimental results confirm that the energy consumption reduced by the proposed EFSRG algorithm is higher than those reduced by other approaches under different scale conditions.

Summary Scheduling multiple parallel workflows, which arrive at different instants on heterogeneous distributed computing systems, is a great challenge because of the different requirements of resource providers and users. Overall scheduling length is the main concern of resource providers, whereas deadlines of workflows are the major requirements of users. Most algorithms use fairness‐based strategies to reduce the overall scheduling length. However, these algorithms cause obvious unfairness to longer‐makespan workflows or shorter‐makespan workflows. Furthermore, the systems cannot meet the deadlines of all workflows, particularly on large‐scale resource‐constrained computational grids. Gaining a reasonable balance between the overall scheduling length and the deadlines of workflows is a desirable goal. In this study, we first propose a fairness‐based scheduling algorithm called fairness‐based dynamic multiple heterogeneous selection value to achieve high performance of systems compared with existing works. Then, to meet the deadlines of partial higher‐priority workflows, we present a priority‐based scheduling algorithm called priority‐based dynamic multiple heterogeneous selection value. Finally, combining fairness‐based dynamic multiple heterogeneous selection value and priority‐based dynamic multiple heterogeneous selection value, we present the tradeoff‐based scheduling algorithm to meet the deadlines of more higher‐priority workflows while still allowing the lower‐priority workflows to be processed actively for better performance of systems. Both example and extensive experimental evaluations demonstrate significant improvement of our proposed algorithms. Copyright © 2016 John Wiley & Sons, Ltd.

Summary Energy consumption is one of the primary design constraints in heterogeneous parallel and distributed systems ranging from small embedded devices to large‐scale data centers. The problem of minimizing the schedule length of an energy consumption‐constrained parallel application has been studied recently in homogeneous systems with a shared memory. To adopt the heterogeneity and distribution of high‐performance computing systems, this study solves the problem of minimizing the schedule length of an energy consumption‐constrained parallel application in heterogeneous distributed systems based on a dynamic voltage and frequency scaling energy‐efficient design technique. The aforementioned problem is divided into 2 subproblems in this study, namely, satisfying energy consumption constraint and minimizing schedule length. The first subproblem is solved by transferring the energy consumption constraint of the application to that of each task, whereas the second subproblem is solved by heuristically scheduling each task with low time complexity. Experiments using both fast Fourier transform and Gaussian elimination parallel applications show that the actual energy consumption values do not always exceed but are close to the given energy consumption constraints. In addition, the minimum schedule lengths are generated using the proposed algorithm.

Heterogeneous processors are increasingly being used in embedded systems where parallel applications with precedence-constrained tasks widely exist. Reliability is an important functional safety requirement and reliability goal should be satisfied for safety-critical parallel applications; meanwhile, resource is limited in embedded systems and it should be minimized. This study solves the problem of resource consumption cost minimization of a reliable parallel application on heterogeneous embedded systems without using fault tolerance. The problem is decomposed into two subproblems, namely, satisfying reliability goal and minimizing resource consumption cost. The first subproblem is solved by transferring the reliability goal of the application to that of each task, and the second subproblem is solved by heuristically assigning each task to the processor with the minimum resource consumption cost while satisfying its reliability goal. Experiments with real parallel applications verify that the proposed algorithm obtains minimum resource consumption costs compared with the state-of-the-art algorithms.

The problem of minimizing the energy consumption of a real-time parallel application on a heterogeneous system has been studied recently, and slack time reclamation based on the dynamic voltage and frequency scaling (DVFS) energy-efficient design technique has been proposed as a solution. However, the state-of-the-art algorithms merely minimize energy consumption through an “upward” approach (i.e., from exit to entry tasks) and do not apply the “downward” approach (i.e., from entry to exit tasks) to energy consumption minimization. This study solves the same problem by employing “downward” and “upward” approaches. The concepts of deadline-slack and task level are introduced to transfer the deadline of the parallel application to each task, that is, “downward” energy consumption minimization is implemented. “Upward” energy consumption minimization by reclaiming the slack time is then included to implement “downward” and “upward” energy consumption minimization with low time complexity. Results of the experiments using real parallel applications show that the proposed algorithm can generate the minimum energy consumption compared with the state-of-the-art algorithms under different real-time and scale conditions.

Energy consumption minimization is one of the primary design requirements for heterogeneous distributed systems. State-of-the-art algorithms are used to study the problem of minimizing the energy consumption of a real-time parallel application with precedence constrained tasks on a heterogeneous distributed system by introducing the concept of latest finish time (LFT) to reclaim the slack time based on the dynamic voltage and frequency scaling (DVFS) energy-efficient design optimization technique. However, the use of DVFS technique alone is insufficient, and the energy consumption reduction is limited because scaling down the frequency is restricted in practice. Furthermore, these studies merely minimize energy consumption through a local energy-efficient scheduling algorithm, such as reducing the energy consumption for each task on the fixed processor, rather than a global energy-efficient scheduling algorithm, such as reducing the energy consumption for each task on different processors. This study solves the problem of minimizing the energy consumption of a real-time parallel application on heterogeneous distributed systems by using the combined non-DVFS and global DVFS-enabled energy-efficient scheduling algorithms. The non-DVFS energy-efficient scheduling (NDES) algorithm is solved by introducing the concept of deadline slacks to reduce the energy consumption while satisfying the deadline constraint. The global DVFS-enabled energy-efficient scheduling (GDES) algorithm is presented by moving the tasks to the processor slacks that generate minimum dynamic energy consumptions. Results of the experiments show that the combined NDES&GDES algorithm can save up to 36.25-55.65 percent of energy compared with state-of-the-art counterparts under different scales, parallelism, and heterogeneity degrees of parallel applications.

Energy efficiency has become a key issue for cloud computing platforms and data centers. Minimizing the total energy consumption of an application is one of the most important concerns of cloud providers, and satisfying the deadline constraint of an application is one of the most important quality of service requirements. Previous methods tried to turn off as many processors as possible by integrating tasks on fewer processors to minimize the energy consumption of a deadline constrained parallel application in a heterogeneous cloud computing system. However, our analysis revealed that turning off as many processors as possible does not necessarily lead to the minimization of total energy consumption. In this study, we propose an energy-aware processor merging (EPM) algorithm to select the most effective processor to turn off from the energy saving perspective, and a quick EPM (QEPM) algorithm to reduce the computation complexity of EPM. Experimental results on real and randomly generated parallel applications validate that the proposed EPM and QEPM algorithms can reduce more energy than existing methods at different scales, parallelism, and heterogeneity degrees.

Computer systems tend to be heterogeneous parallel and distributed computing systems, which are characterized by having various types of computational units interconnected via networks for executing multiple parallel jobs precedence-constrained tasks. Scheduling multiple jobs, which arrive at different instants, on such systems for fastest execution is a well-known NP-hard optimization problem. In order to achieve high-performance of systems, two important factors can be improved. One factor is the heterogeneity. Most algorithms use the upward rank value for ordering tasks and the earliest finish time for assigning processors. These two criteria can be improved to permit creating accurate and efficient schedules in heterogeneous distributed computing systems. Another factor is the fairness, existing algorithms are for static scheduling, and failed to make full use of the fairness in dynamic environments, such that obvious unfairness to longer-makespan jobs or shorter-makespan jobs can be caused. A dynamic multiple parallel jobs scheduling algorithm called F DMHSV (Fairness of Dynamic Multiple Heterogeneous Selection Value) is proposed to address the above problems to achieve high-performance of systems in this paper. Both example and extensive experimental evaluation demonstrate significant improvement of the F_DMHSV algorithm.

A high-performance scheduling for a DAG (Directed Acyclic Graph) task graph on heterogeneous networked embedded systems or parallel and distributed systems is to maximize concurrency and minimize inter-processor communication. Most of the algorithms using upward rank value for task prioritizing and earliest finish time for processor assignment. But both approaches ignored the heterogeneity of system and could not create accurate and efficient schedules. Yet no one has doubled about and recognized that. A fully heterogeneous task scheduling algorithm is proposed to address the above problems in this paper. The fundamentals of DAG model and corresponding algorithms are investigated. New concepts called Heterogeneous Upward Rank Value (HURV) and Heterogeneous Priority Rank Value (HPRV) are defined. An algorithm called Heterogeneous Select Value (HSV) is proposed in paper. Both benchmark and extensive experimental evaluation demonstrate the significant improvements in proposed algorithm.