EDBT 2026 Demo / reviewers in the wild / expert
Keh-Chung Wang
dblp:147/5399
· DBLP profile ↗
3ranked-venue papers
0as first author
2since 2021 · last 2022
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 2 since 2021Applied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Memory systems · 56% Storage systems · 38% Hardware accelerators and domain-specific architectures · 6% |
Topics — the 8 heaviest of 9, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Storage systems › flash and SSD › flash memory › NAND flash
3D NAND flash |
0.6 | 1 | 2022 | ICE: An Intelligent Cognition Engine with 3D NAND-based In-Memory Computing for Vector Similarity Search Acceleration · MICRO 2022 |
Memory systems
in-memory computing |
0.6 | 1 | 2022 | ICE: An Intelligent Cognition Engine with 3D NAND-based In-Memory Computing for Vector Similarity Search Acceleration · MICRO 2022 |
Storage systems › computational storage
in-storage computing |
0.6 | 1 | 2022 | ICE: An Intelligent Cognition Engine with 3D NAND-based In-Memory Computing for Vector Similarity Search Acceleration · MICRO 2022 |
Memory systems
processing-in-memory |
0.6 | 1 | 2022 | ICE: An Intelligent Cognition Engine with 3D NAND-based In-Memory Computing for Vector Similarity Search Acceleration · MICRO 2022 |
Memory systems › processing-in-memory
vector similarity search |
0.6 | 1 | 2022 | ICE: An Intelligent Cognition Engine with 3D NAND-based In-Memory Computing for Vector Similarity Search Acceleration · MICRO 2022 |
Hardware accelerators and domain-specific architectures › domain-specific accelerator
vector search accelerator |
0.2 | 1 | 2022 | ICE: An Intelligent Cognition Engine with 3D NAND-based In-Memory Computing for Vector Similarity Search Acceleration · MICRO 2022 |
Integrated circuit design › analog and mixed-signal circuits
analog/RF circuit design |
0.0 | 1 | 1993 | GaAs-based heterojunction bipolar transistors for very high performance electronic circuits · Proc. IEEE 1993 |
Integrated circuit design › semiconductor devices
heterojunction bipolar transistor |
0.0 | 1 | 1993 | GaAs-based heterojunction bipolar transistors for very high performance electronic circuits · Proc. IEEE 1993 |
Methods — techniques the papers use, named apart from their topics
in-memory computing · 0.6bit-error-tolerance encoding · 0.6
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2022 | ICE: An Intelligent Cognition Engine with 3D NAND-based In-Memory Computing for Vector Similarity Search AccelerationabstractVector similarity search (VSS) for unstructured vectors generated via machine learning methods is a promising solution for many applications, such as face search. With increasing awareness and concern about data security requirements, there is a compelling need to store data and process VSS applications locally on edge devices rather than send data to servers for computation. However, the explosive amount of data movement from NAND storage to DRAM across memory hierarchy and data processing of the entire dataset consume enormous energy and require long latency for VSS applications. Specifically, edge devices with insufficient DRAM capacity will trigger data swap and deteriorate the execution performance. To overcome this crucial hurdle, we propose an intelligent cognition engine (ICE) with cognitive 3D NAND, featuring non-volatile in-memory computing (nvIMC) to accelerate the processing, suppress the data movement, and reduce data swap between the processor and storage. This cognitive 3D NAND features digital nvIMC techniques (i. e., ADClDAC-free approach), high-density 3D NAND, and compatibility with standard 3D NAND products with minor modifications. To facilitate parallel INT8/INT4 vector-vector multiplication (VVM) and mitigate the reliability issue of 3D NAND, we develop a bit-error-tolerance data encoding and a two’s complement-based digital accumulator. VVM can support similarity computations (e.g., cosine similarity and Euclidean distance), which are required to search “the most similar data” right where they are stored. In addition, the proposed solution can be realized on edge storage products, e.g., embedded Multi-Media Card (eMMC). The measured and simulated results on real 3D NAND chips show that ICE enhances the system execution time by $17\times to 95\times$ and energy efficiency by $11\times to 140\times$, compared to traditional von Neumann approaches using state-of-the-art edge systems with MobileFaceNet on CASIA-WebFace dataset. To the best of our knowledge, this work demonstrates the first 3D NAND-based digital nvIMC technique with measured silicon data. Han-Wen Hu, Wei-Chen Wang 0002, Yuan-Hao Chang 0001, Yung-Chun Lee, Bo-Rong Lin, Huai-Mu Wang, Yen-Po Lin, Chong-Ying Lee, Tzu-Hsiang Su, Chih-Chang Hsieh, Chia-Ming Hu, Yi-Ting Lai, Chung Kuang Chen, Han-Sung Chen, Hsiang-Pang Li, Tei-Wei Kuo, Meng-Fan Chang, Keh-Chung Wang, Chun-Hsiung Hung, Chih-Yuan Lu |
MICRO | 19 |
| 2021 | Design of Computing-in-Memory (CIM) with Vertical Split-Gate Flash Memory for Deep Neural Network (DNN) Inference AcceleratorabstractComputing-In-Memory (CIM) using Flash memory is a potential solution to support a heavy-weight DNN inference accelerator for edge computing applications. Flash memory provides the best high-density and low-cost non-volatile memory solution to store the weights, while CIM functions of Flash memory can compute AI neural network calculations inside the memory chip. Our analysis indicates that Flash CIM can save data movements by ~85% as compared with the conventional Von-Neumann architecture. In this work, we propose a detail device and design co-optimizations to realize Flash CIM, using a novel vertical split-gate Flash device. Our device supports low-voltage (<; 1V) read at WL's and BL's, tight and tunable cell current (Icell) ranging from 150nA to 1.5uA, extremely large Icell ON/OFF ratio ~ 7 orders, small RTN noise and negligible read disturb to provide a high-performance and highly-reliable CIM solution. Hang-Ting Lue, Han-Wen Hu, Tzu-Hsuan Hsu, Po-Kai Hsu, Keh-Chung Wang, Chih-Yuan Lu |
ISCAS | 5 |
| 1993 | GaAs-based heterojunction bipolar transistors for very high performance electronic circuitsabstractThis paper reviews the principles and status of AlGaAs/GaAs heterojunction bipolar transistor technology. Comparisons of this technology with Si bipolar transistor and GaAs field-effect transistor technologies are made. Epitaxial materials, fabrication processes, transistor DC and RF characteristics, and modeling of AlGaAs/GaAs HBT's are described. Key areas of HBT application are also highlighted.> Peter M. Asbeck, Mau-Chung Frank Chang, Keh-Chung Wang, Gerard J. Sullivan, Derek T. Cheung |
Proc. IEEE | 3 |