Field-programmable gate arrays (FPGAs) are extremely advanced with regard to high performance; they are becoming one of the primary device choices to realize high-performance computing (HPC). In this work, we propose an FPGA-based accelerator for the two-dimensional (2D) finite difference method (FDM) with the implicit scheme and implement a 2D unsteady-state heat conduction simulation using red/black successive over-relaxation (SOR). The accelerator consists of a 2D single-instruction multiple-data (SIMD) array processor, which has pipelined processing elements (PEs) including 32-bit floating point calculation units. This processor can avoid the memory-access bottleneck and perform with high operating efficiency and low waiting time for data transfer by applying the proposed control method with synchronous shift data transfer. We demonstrate that the experimental hardware implemented on an Altera Stratix V FPGA (5SGSMD5K2F40C2N) reaches a 99.83% operating rate of the calculation units for the computation of red/black SOR. In addition, it is approximately six times faster than GPU computing on an NVIDIA GeForce GTX 770 for a 32-bit floating-point calculation of a printed circuit board (PCB) heat conduction simulation, and it is about eight times faster than an NVIDIA Tesla C2075 for the same calculation.

Three-dimensional (3D) numerical simulation is an indispensable technique for various analyses of physical phenomena, but it generally requires numerous computation. In this paper, we propose an FPGA-based accelerator for 3D numerical simulations and focus on acceleration of the 3D finite-difference time-domain (FDTD) method. This accelerator consists of a 2D single instruction multiple data (SIMD) array processor, and it can execute 3D parallel computing with little data transfer overhead by applying virtual processing-elements cuboid (VPEC) with synchronous shift data transfer. We demonstrate that the experimental hardware implemented on an Altera Stratix V FPGA (5SGSMD5K2F40C2N) is 3.1 times faster than parallel computing on the NVIDIA Tesla C2075, and it reaches a 94.57% operating rate of the calculation units for the computation of the 3D FDTD method. The proposed accelerator is suitable for multi-chip composition.