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Marc S. Orr

dblp:148/9928 · DBLP profile ↗
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4ranked-venue papers
3as first author
0since 2021 · last 2017
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 3 first-authorSoftware engineering, systems software and programming languages · 2 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
4 papers
Parallel and multicore computing · 40% GPUs and heterogeneous computing · 27% Memory systems · 24%
Software engineering, system software, and programming languages
1 paper
Concurrent programming · 100%

Topics — the 15 heaviest of 15, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing › parallel programming models › message passing
fine-grain messaging
0.312017
Gravel: fine-grain GPU-initiated network messages · SC 2017
GPUs and heterogeneous computing › GPU communication
GPU-initiated communication
0.312017
Gravel: fine-grain GPU-initiated network messages · SC 2017
Parallel and multicore computing › parallel computing › parallel communication
inter-node communication
0.312017
Gravel: fine-grain GPU-initiated network messages · SC 2017
Concurrent programming
memory models
0.212016
Lazy release consistency for GPUs · MICRO 2016
GPUs and heterogeneous computing › GPU memory
GPU memory model
0.212016
Lazy release consistency for GPUs · MICRO 2016
Memory systems › memory consistency › memory consistency model › release consistency
lazy release consistency
0.212016
Lazy release consistency for GPUs · MICRO 2016
Memory systems › memory consistency
memory consistency model
0.212016
Lazy release consistency for GPUs · MICRO 2016
Memory systems
memory consistency
0.212015
Synchronization Using Remote-Scope Promotion · ASPLOS 2015
Parallel and multicore computing
synchronization
0.212015
Synchronization Using Remote-Scope Promotion · ASPLOS 2015
GPUs and heterogeneous computing
GPU computing
0.212014
Fine-grain task aggregation and coordination on GPUs · ISCA 2014
Parallel and multicore computing
parallel programming models
0.212014
Fine-grain task aggregation and coordination on GPUs · ISCA 2014
Distributed systems
task clustering
0.212014
Fine-grain task aggregation and coordination on GPUs · ISCA 2014
Parallel and multicore computing › parallel programming models
task parallelism
0.212014
Fine-grain task aggregation and coordination on GPUs · ISCA 2014
Interconnection networks and networks-on-chip
network interface
0.112017
Gravel: fine-grain GPU-initiated network messages · SC 2017
GPUs and heterogeneous computing › heterogeneous architecture
heterogeneous system architecture
0.112015
Synchronization Using Remote-Scope Promotion · ASPLOS 2015

Methods — techniques the papers use, named apart from their topics

message routing · 0.3GPU programming · 0.3remote-scope promotion · 0.2wavefront yield · 0.2channel abstraction · 0.2
YearPublicationVenuePosition
2017 Gravel: fine-grain GPU-initiated network messages
abstract
Distributed systems incorporate GPUs because they provide massive parallelism in an energy-efficient manner. Unfortunately, existing programming models make it difficult to route a GPU-initiated network message. The traditional coprocessor model forces programmers to manually route messages through the host CPU. Other models allow GPU-initiated communication, but are inefficient for small messages.
Marc S. Orr, Shuai Che, Bradford M. Beckmann, Mark Oskin, Steven K. Reinhardt, David A. Wood 0001
SC1
2016 Lazy release consistency for GPUs
abstract
The heterogeneous-race-free (HRF) memory model has been embraced by the Heterogeneous System Architecture (HSA) Foundation and OpenCLTMbecause it clearly and precisely defines the behavior of current GPUs. However, compared to the simpler SC for DRF memory model, HRF has two shortcomings. The first is that HRF requires programmers to label atomic memory operations with the correct scope of synchronization. This explicit labeling can save significant coherence overhead when synchronization is local, but it is tedious and error-prone. The second shortcoming is that HRF restricts important dynamic data sharing patterns like work stealing. Prior work on remote-scope promotion (RSP) attempted to resolve the second shortcoming. However, RSP further complicates the memory model and no scalable implementation of RSP has been proposed. For example, we found that the previously proposed RSP implementation actually results in slowdowns of up to 30% on large GPUs, compared to a naïve baseline system that forgoes work stealing and scopes. Meanwhile, DeNovo has been shown to offer efficient synchronization with an SC for DRF memory model, performing on average 21% better than our baseline system, but it introduces additional overheads to maintain ownership of all modified data. To resolve these deficiencies, we propose to adapt lazy release consistency - previously only proposed for homogeneous CPU systems - to a heterogeneous system. Our approach, called hLRC, uses a DeNovo-like mechanism to track ownership of synchronization variables, lazily performing coherence actions only when a synchronization variable changes locations. hLRC allows GPU programmers to use the simpler SC for DRF memory model without tracking ownership for all modified data. Our evaluation shows that lazy release consistency provides robust performance improvement across a set of work-stealing graph analysis applications - 29% on average versus the baseline system.
Johnathan Alsop, Marc S. Orr, Bradford M. Beckmann, David A. Wood 0001
MICRO2
2015 Synchronization Using Remote-Scope Promotion
abstract
Heterogeneous system architecture (HSA) and OpenCL define scoped synchronization to facilitate low overhead communication across a subset of threads. Scoped synchronization works well for static sharing patterns, where consumer threads are known a priori. It works poorly for dynamic sharing patterns (e.g., work stealing) where programmers cannot use a faster small scope due to the rare possibility that the work is stolen by a thread in a distant slower scope. This puts programmers in a conundrum: optimize the common case by synchronizing at a faster small scope or use work stealing at a slower large scope. In this paper, we propose to extend scoped synchronization with remote-scope promotion. This allows the most frequent sharers to synchronize through a small scope. Infrequent sharers synchronize by promoting that remote small scope to a larger shared scope. Synchronization using remote-scope promotion provides performance robustness for dynamic workloads, where the benefits provided by scoped synchronization and work stealing are hard to anticipate. Compared to a naïve baseline, static scoped synchronization alone achieves a 1.07x speedup on average and dynamic work stealing alone achieves a 1.18x speedup on average. In contrast, synchronization using remote-scope promotion achieves a robust 1.25x speedup on average, across a diverse set of graph benchmarks and inputs.
Marc S. Orr, Shuai Che, Ayse Yilmazer, Bradford M. Beckmann, Mark D. Hill, David A. Wood 0001
ASPLOS1
2014 Fine-grain task aggregation and coordination on GPUs
abstract
In general-purpose graphics processing unit (GPGPU) computing, data is processed by concurrent threads executing the same function. This model, dubbed single-instruction/multiple-thread (SIMT), requires programmers to coordinate the synchronous execution of similar operations across thousands of data elements. To alleviate this programmer burden, Gaster and Howes outlined the channel abstraction, which facilitates dynamically aggregating asynchronously produced fine-grain work into coarser-grain tasks. However, no practical implementation has been proposed. To this end, we propose and evaluate the first channel implementation. To demonstrate the utility of channels, we present a case study that maps the fine-grain, recursive task spawning in the Cilk programming language to channels by representing it as a flow graph. To support data-parallel recursion in bounded memory, we propose a hardware mechanism that allows wavefronts to yield their execution resources. Through channels and wavefront yield, we implement four Cilk benchmarks. We show that Cilk can scale with the GPU architecture, achieving speedups of as much as 4.3x on eight compute units.
Marc S. Orr, Bradford M. Beckmann, Steven K. Reinhardt, David A. Wood 0001
ISCA1