Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Moshe Avital

dblp:149/5058 · DBLP profile ↗
← Back
4ranked-venue papers
2as first author
2since 2021 · last 2024
0000-0002-3812-8697ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 2 first-author · 1 since 2021Security and privacy · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
2 papers
Hardware security and side channels · 100%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Embedded and real-time systems · 54% Electronic design automation · 46%

Topics — the 4 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware security and side channels
side-channel attack
1.422024
Revealing the Secrets of Radio Embedded Systems: Extraction of Raw Information via RF · IEEE Trans. Inf. Forensics Secur. 2024
Analytical Side Channel EM Models, Extending Simulation Abilities for ICs, and Linking Physical Models to Cryptographic Metrics · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023
Hardware security and side channels › side-channel attack
electromagnetic side channel
0.812024
Revealing the Secrets of Radio Embedded Systems: Extraction of Raw Information via RF · IEEE Trans. Inf. Forensics Secur. 2024
Hardware security and side channels › side-channel attack › electromagnetic side channel
electromagnetic side-channel analysis
0.712023
Analytical Side Channel EM Models, Extending Simulation Abilities for ICs, and Linking Physical Models to Cryptographic Metrics · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023
Electronic design automation › interconnect modeling
electromagnetic modeling
0.212023
Analytical Side Channel EM Models, Extending Simulation Abilities for ICs, and Linking Physical Models to Cryptographic Metrics · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023

Methods — techniques the papers use, named apart from their topics

side-channel analysis · 1.5code-injection gadgets · 1.5RF front-end coupling · 1.5method of images · 1.3electromagnetic simulation · 1.3
YearPublicationVenuePosition
2024 Revealing the Secrets of Radio Embedded Systems: Extraction of Raw Information via RF
abstract
This article discusses the critical issue of the remote extraction of information from radio-enabled embedded systems, and focuses on sources emanating from micrometer wavelengths. These sources include intra-chip or inter-device buses and board-level routing traces, within tens of centimeters of the system’s transmission antenna or front end (FE). Traditionally, side-channel analysis (SCA) attacks center on micrometer-level signal that emanate direct near-field information detectable within centimeters. Simple power analysis (SPA) attacks focus similarly over stronger signals and fewer statistics. Here, however, we turn to typically larger elements corresponding to larger wavelengths than previously reported. Recent discoveries reveal that radio-enabled systems can transmit data over far-field distances, which can be analyzed via SCA-like methods. Studies have also described direct data extraction from centimeter to tens of centimeters-scale sources such as SATA, USB, and others. These sources act as substantial transmission antennas. This article differs considerably from these works, since it targets intermediate wavelengths which find their way to leak into the RF-FE. We document a significant security challenge: nearly all signals within embedded systems, even serial ports, DMA-controlled memory access, and others, leak what can be considered to practically be raw information with high-SNR over tens of centimeters to the RF-FE. This has strong implications for signal integrity, security, and standards related to electromagnetic compatibility (EMC), signal shielding, and interference (EMI, RFI). We show that onboard signals with galvanic connections to the RF-FE-chip and onboard signals without galvanic connections to the RF-FE-chip are coupled, amplified and transmitted with high SNR, which enables quasi-raw extraction. We further demonstrate how sophisticated adversaries can build code-injection gadgets that can carry sensitive data and modulate the stream to be optimally extracted by the RF-channel. Practical demonstrations using commercial and low-cost equipment reinforce our claims. Specifically, we show that without concrete interference and isolation standards designed with security in mind, mitigating these leakages remains a challenge.
Erez Danieli, Menachem Goldzweig, Moshe Avital, Itamar Levi
IEEE Trans. Inf. Forensics Secur.3
2023 Analytical Side Channel EM Models, Extending Simulation Abilities for ICs, and Linking Physical Models to Cryptographic Metrics
abstract
Electromagnetic (EM) side channel analysis (SCA) attacks have evolved to a significant threat for integrated circuits (ICs). Radiation, emanated from devices which manipulate sensitive information, carries it with a sufficient signal-to-noise ratio. Security evaluation in design stages, from a model or from a simulation, is complicated and hard to argue for correctness. Extensive literature exist on attacks utilizing EM signals. However, both frontiers of simulatability and modeling of the radiation have shown rather little research effort in the past in the SCA context. On simulatability prior work investigated utilization of complete EM physical solvers, such as COMSOL, HFSS which require much effort from the user/engineer to model the electronic environment, or alternatively used simulated (SPICE) currents within IC’s design kits and from it provide analytical estimation. On the modeling side, efforts were mainly limited to either: a specific EM component (e.g., magnetic), very limited scope of the model, or a limited connection with real-life IC. The main contributions of this research are: 1) providing a fully analytical model of the radiated signal considering the ground plane of the substrate and the medium change from oxidation layers to other mediums, such as air or plastic, utilizing EM theory-of-images for both E and H fields; 2) providing methodologies to simulate EM signals on IC-technologies (by adapting Cadence EMX tool); and 3) demonstrating little error between the analytical and simulated models and linking cryptographic SCA security metrics to the analytical tools. The developed model provides significant added value for security architects, faster, premanufacturing evaluation and a verifiability framework through IC tool.
Edut Katz, Moshe Avital, Yoav Weizman, Itamar Levi
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
2015 Randomized Multitopology Logic Against Differential Power Analysis
abstract
Side channel attacks have become one of the most significant problems in modern digital systems. In particular, differential power analysis (DPA) has emerged as a powerful technique because it does not require any assumptions regarding the hardware implementation of a crypto-chip. In this paper, a new randomized multitopology logic (RMTL) is proposed to enhance immunity to DPA. RMTL refers to a family of dedicated security-oriented gates whose power profile cannot be predicted by external observers. Specifically, each gate of this logic can be configured in real time to operate in a different circuit topology, where each topology induces a different power profile. Immunity to DPA attacks is obtained by randomly changing each gate's topology on run time. The suggested approach can coexist with common existing countermeasures. Theoretical analysis and simulation results, conducted in a standard 40-nm technology, clearly show higher immunity to DPA attacks when using the proposed approach compared with standard CMOS implementation.
Moshe Avital, Hadar Dagan, Osnat Keren, Alexander Fish
IEEE Trans. Very Large Scale Integr. Syst.1
2014 Secured Dual Mode Logic (DML) as a countermeasure against Differential Power Analysis
abstract
Security of the digital systems is under the threat from so called side channel attacks. In particular, Differential Power Analysis (DPA) is a powerful technique, as it does not require any assumption regarding the chip implementation of the device. In this paper, we introduce a novel countermeasure strategy to deal with DPA attacks. This approach is based on randomization methodology of the Dual Mode Logic (DML) family. This logic family basically comprises two modes of operation: static and dynamic modes, each having a different power profile. We design the desired cryptographic module using DML gates while switching randomly between operation modes of these gates. This results in power profile which is much more difficult to estimate, and therefore makes the DPA attack less effective. Simulation results, conducted in a standard 40nm technology, prove the efficiency of the proposed methodology.
Moshe Avital, Alexander Fish
ISCAS1