A successful hardware/software architecture that resolves performance bottlenecks at the workstation-to-network host interface and offers high end-to-end performance is described. The solution reported carefully splits protocol processing functions into hardware and software implementations. The interface hardware is highly parallel and performs all per-cell functions with dedicated logic to maximize performance. Software provides support for the transfer of data between the interface and application memory, as well as the state management necessary for virtual circuit setup and maintenance. In addition, all higher-level protocol processing is implemented with host software. The prototype connects a RISC System/6000 to a SONET-based asynchronous transfer model (ATM) network carrying data at the OC-3c rate of 155 Mb/s. An experimental evaluation of the interface hardware and software has been performed. Several conclusions are drawn about this host interface architecture and the workstations to which it is connected.>

The advent of high speed networks has increased demands on processor architectures.These architectural demands are due to the increase in network bandwidth relative to the speeds of processor components.One impottant component for a balanced system is the workstation-to-network ho,u inlerjface.Our solution migrates a carefully selected set of protocol processing functions into hardware.It connects an IBM RS/6000 workstation to a Synchronous Optical Network (SONET) STS-3c~line carrying fmedsize Asynchronous Transfer Mode (ATM) cells.The host interface described in this paper is highly parallel and a pure hardware solution to maximize performance.The~is a clean separation between the interface functions, such as segmentation and reassembly, and the interfacelhost communication.This separation eases porting the interface to other workstation plafforms.We intend to use this interface (and its successors) as a component of the AURORA gigabit per second (Gbps) testbed.