Demo Data from EDBT 2026 / reviewers in the wild / expert
Yahong Cao
dblp:15/1918
· DBLP profile ↗
2ranked-venue papers
1as first author
0since 2021 · last 2005
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › circuit simulation
model order reduction |
0.1 | 2 | 2005 | HiPRIME: hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2005 HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery · DAC 2002 |
Electronic design automation
circuit simulation |
0.1 | 1 | 2005 | HiPRIME: hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2005 |
Electronic design automation › interconnect modeling
interconnect macromodeling |
0.1 | 1 | 2005 | HiPRIME: hierarchical and passivity preserved interconnect macromodeling engine for RLKC power delivery · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2005 |
Electronic design automation
interconnect modeling |
0.0 | 1 | 2002 | HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery · DAC 2002 |
Electronic design automation › power integrity
power delivery network analysis |
0.0 | 1 | 2002 | HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power delivery · DAC 2002 |
Methods — techniques the papers use, named apart from their topics
PRIMA · 0.1passivity preservation · 0.1extended krylov subspace method · 0.1improved extended krylov subspace · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2005 | HiPRIME: hierarchical and passivity preserved interconnect macromodeling engine for RLKC power deliveryabstractThis paper proposes a general hierarchical analysis methodology, HiPRIME, to efficiently analyze RLKC power delivery systems. After partitioning the circuits into blocks, we develop and apply the IEKS (Improved Extended Krylov Subspace) method to build the multiport Norton equivalent circuits which transform all the internal sources to Norton current sources at ports. Since there are no active elements inside the Norton circuits, passive or realizable model order reduction techniques such as PRIMA can be applied. The significant speed improvement, 700 times faster than Spice with less than 0.2% error and 7 times faster than a state-of-the-art solver, InductWise, is observed. To further reduce the top-level hierarchy runtime, we develop a second-level model reduction algorithm and prove its passivity. Yu-Min Lee, Yahong Cao, Tsung-Hao Chen, Janet Roveda, Charlie Chung-Ping Chen |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 2 |
| 2002 | HiPRIME: hierarchical and passivity reserved interconnect macromodeling engine for RLKC power deliveryabstractThis paper proposes a general hierarchical analysis methodology, HiPRIME, to efficiently analyze RLKC power delivery systems. After partitioning the circuits into blocks, we develop and apply the IEKS (Improved Extended Krylov Subspace) method to build the Multi-port Norton Equivalent circuits which transform all the internal sources to Norton current sources at ports. Since there is no active elements inside the Norton circuits, passive or realizable model order reduction techniques such as PRIMA can be applied. To further reduce the top-level hierarchy runtime, we develop a second-level model reduction algorithm and prove its passivity. Experimental results show 400-700X runtime improvement with less than 0.2% error. Yahong Cao, Yu-Min Lee, Tsung-Hao Chen, Charlie Chung-Ping Chen |
DAC | 1 |