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Jin-Jye Chou

dblp:15/2302 · DBLP profile ↗
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4ranked-venue papers
0as first author
0since 2021 · last 1998
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2Computer networks · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
4 papers
Interconnection networks and networks-on-chip · 49% Parallel and multicore computing · 18% Electronic design automation · 18%

Topics — the 9 heaviest of 10, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing › parallel algorithms › sorting
bitonic sort
0.021998
Some Topological Properties of Bitonic Sorters · IEEE Trans. Computers 1998
Diagnosis of single faults in bitonic sorters · IEEE/ACM Trans. Netw. 1994
Electronic design automation › hardware verification and test
fault diagnosis
0.021998
Some Topological Properties of Bitonic Sorters · IEEE Trans. Computers 1998
Diagnosis of single faults in bitonic sorters · IEEE/ACM Trans. Netw. 1994
Interconnection networks and networks-on-chip › switching network
multistage interconnection network
0.021998
Some Topological Properties of Bitonic Sorters · IEEE Trans. Computers 1998
Testing the Dynamic Full Access Property of a Class of Multistage Interconnection Networks · IEEE Trans. Parallel Distributed Syst. 1994
Interconnection networks and networks-on-chip › switching network › multistage interconnection network
banyan network
0.021994
Testing the Dynamic Full Access Property of a Class of Multistage Interconnection Networks · IEEE Trans. Parallel Distributed Syst. 1994
Fault Tolerance of Banyan Using Multiple-Pass · INFOCOM 1992
Distributed systems
fault tolerance
0.021994
Testing the Dynamic Full Access Property of a Class of Multistage Interconnection Networks · IEEE Trans. Parallel Distributed Syst. 1994
Fault Tolerance of Banyan Using Multiple-Pass · INFOCOM 1992
Interconnection networks and networks-on-chip
switching network
0.021998
Diagnosis of single faults in bitonic sorters · IEEE/ACM Trans. Netw. 1994
Some Topological Properties of Bitonic Sorters · IEEE Trans. Computers 1998
Interconnection networks and networks-on-chip
network reconfiguration
0.011994
Testing the Dynamic Full Access Property of a Class of Multistage Interconnection Networks · IEEE Trans. Parallel Distributed Syst. 1994
Interconnection networks and networks-on-chip
nonblocking networks
0.011998
Some Topological Properties of Bitonic Sorters · IEEE Trans. Computers 1998
Hardware reliability and fault tolerance › memory repair
dynamic full access
0.011992
Fault Tolerance of Banyan Using Multiple-Pass · INFOCOM 1992

Methods — techniques the papers use, named apart from their topics

topological analysis · 0.0binary search · 0.0probabilistic analysis · 0.0multiple-pass routing · 0.0
YearPublicationVenuePosition
1998 Some Topological Properties of Bitonic Sorters
abstract
The paper proves some topological properties of bitonic sorters, which have found applications in constructing, along with banyan networks, internally nonblocking switching fabrics in future broadband networks. The states of all the sorting elements of an N/spl times/N bitonic sorter are studied for four different input sequences {a/sub i/}/sub i=l//sup N/, {b/sub i/}/sub i=l//sup N/, {c/sub i/}/sub i=l//sup N/, and {d/sub i/}/sub i=l//sup N/ where a/sub i/=i-1, b/sub i/=N-i, and the binary representations of c/sub i/ and d/sub i/ are the bit reverse of those of a/sub i/ and b/sub i/, respectively. An application of these topological properties is to help design efficient fault diagnosis procedures. We present an example for detecting and locating a single faulty sorting element under a simple fault model where all sorting elements are always in the straight state or the cross state.
Tsern-Huei Lee, Jin-Jye Chou
IEEE Trans. Computers2
1994 Diagnosis of single faults in bitonic sorters
abstract
Bitonic sorters have recently been proposed to construct along with banyan networks the switching fabric of future broadband networks. Unfortunately, a single fault in a bitonic sorter may have disastrous consequences for the switching system. Therefore, a bitonic sorter must be proved to be free of faults before it can be used. We study the topological properties of bitonic sorters and present an efficient fault diagnosis procedure to detect, locate, and identify the fault type of single faults. Our diagnosis procedure can detect most single faults in two tests. Faults which cannot be detected in two tests can always be detected in four tests. Several binary search techniques are developed to locate a faulty sorting element (i.e. a 2/spl times/2 sorter).>
Tsern-Huei Lee, Jin-Jye Chou
IEEE/ACM Trans. Netw.2
1994 Testing the Dynamic Full Access Property of a Class of Multistage Interconnection Networks
abstract
The banyan network, and networks topologically equivalent to it, have recently been adopted as interconnection networks in multiprocessor systems. Often, a multiprocessor system is reconfigured when the banyan network becomes faulty. It is possible to avoid a complicated reconfiguration process as long as the faulty banyan network still possesses the dynamic full access (DFA) property. In this paper, we determine a necessary and sufficient condition for a faulty banyan network to possess the DFA property and design a test procedure based on the condition. The test procedure can be used to decompose a faulty banyan network into subsystems possessing the DFA property. We also evaluate the probability that a banyan network loses the DFA property, given the number of faulty switching elements. It is found that as long as faults do not occur in switching elements located in the first and last stages, this probability is very small, even when there are quite a few faulty switching elements.>
Tsern-Huei Lee, Jin-Jye Chou
IEEE Trans. Parallel Distributed Syst.2
1992 Fault Tolerance of Banyan Using Multiple-Pass
abstract
In order to utilize multiple-pass routing schemes, a faulty banyan network must possess the dynamic full access (DFA) property. The authors determine a necessary and sufficient condition for a banyan network to possess the DFA property and design a general testing procedure based on the condition. They also enumerate the probability that a banyan network loses the DFA property, given the number of faulty switch elements. It is found that, as long as faults do not occur in switch elements located in the first and last stages, this probability is very small even when there are quite a few faulty switch elements. Therefore, multiple-pass routing schemes can be very useful if the switch elements in the first and last stages are well protected.>
Tsern-Huei Lee, Jin-Jye Chou
INFOCOM2