In this paper, we propose novel algorithms for pattern matching which dissects patterns into rectangles based on polygon edges. Unlike other design rule check (DRC)-based pattern matching algorithms, our solution utilizes simple DRC edge length rules to create rectangles for hotspot pattern descriptions. This approach has at least three advantages over other solutions. First, it is faster than other state-of-the-art pattern matching tools. Second, it is intuitive and simple for pattern matching engineers to understand and describe patterns. Third, it scales well for parallel computation. We also show how to improve pattern matching run time using vector space created by an origin rectangle and other reference rectangles inside a pattern bounding box. By adopting the vector concept, we iterate only once or twice when detecting different pattern orientations. Other pattern matching techniques usually iterate eight times (4 rotations × 2 mirrored images) to detect all of the eight different orientations. Our method eliminates these unnecessary iterations.

A modeling approach for parallel structures (PSs) is introduced based on the processor-time (P-T) diagram (Gantt chart). The key features are that design requirements are represented as work required, individual and collective module designs as work accomplished, and resource utilization as work wasted. These representations are given simple geometric interpretations in the P-T diagram, making analysis of deterministic models an exercise in algebra. Next, performance parameters are derived which are provably ideal and can be used with profit for comparing competing designs or the quality of a particular design in terms of its execution time and use of resources. Then the authors describe the application of these performance measures to develop an efficient parallel structure.

The MITRE Corporation, a not for profit Federal Contract Research Center (FCRC), has been involved in Command, Control and Communications (C 3) Systems Engineering for the past twenty years. MITRE's program in support of the Defense Communications Agency (DCA)/Command and Control Technical Center (CCTC) involves planning and systems engineering for the Worldwide Military Command and Control System (WWMCCS). Included as components of the WWMCCS are survivable command centers such as the National Emergency Airborne Command Post (NEACP). MITRE has been involved in the system engineering functions of the NEACP Automatic Data Processing (ADP) system and other austere command posts. A portion of MITRE's overall system engineering activities included the design of an austere graphics capability for the NEACP ADP system. This paper explains the constraints, problems, needs and solutions to this engineering project.