Ahstract-White-box cryptography aims at protecting software implementations of cryptographic algorithms when the attacker has complete control over the execution environment. Since the early 2000's, white-box implementations of block ciphers have received great interest from the community. Nevertheless and despite the needs of the industry, asymmetric cryptography has not really been studied in this context for many years. Indeed, it was only in 2020 that Zhou et al. published the very first asymmetric white-box design which aims at protecting ECDSA implementations. Their publication was a great step forward for the community which could finally tackle the subject of asymmetric white-box. In this paper, we study the security of this scheme and we exhibit efficient ways to recover the private key by using fault analysis. Indeed, we detail two different attacks which require two fault injections only to obtain the corresponding ECDSA private key. Finally, we also suggest a countermeasure that prevents both our attacks without impacting the size of the white-box or the performances of the scheme.

Either based on voltage, LASER or electro-magnetic disturbances, fault attacks represent an ever growing threat to cryptographic implementations, all the more when multiple-fault scenarios are considered. The state-of-the-art of fault countermeasures is essentially divided into two paradigms: Detection-based and infection-based countermeasures. The simple concept of detection-based countermeasures has been proven efficient to counteract fault attacks and easily extendable to handle high-order fault models. On the other hand, the design of infective countermeasures is much more challenging since most proposals have been broken in a single-fault setting. In this paper we present a new infective countermeasure framework fit for any symmetric cryptosystem. This framework takes into account the fatal flaws of previous infective proposals. Our framework can be instantiated in various flavours depending on the context of use and the available software or hardware components. In addition, we describe how our framework can be set-up to handle high-order fault attacks. As far as we know, this is the first time an infective countermeasure proposes such a feature.

At FDTC 2014, two new infective countermeasures were suggested to efficiently protect the CRT-RSA against FA. The security of these countermeasures has been translated from the security of their detective counterparts, the latter being proved secure thanks to a formal analysis tool. In this article, we reveal a flaw in the proof of security of the translation. Furthermore, we exhibit several attacks on both infective countermeasures with respect to the very same fault model originally considered. We thus prove that such a methodology does not provide secure results and must not be used to design effective countermeasures.

Fault attacks are a common threat for embedded secure implementations. Among the various kinds of countermeasures proposed so far, the principle of infective computation seems to be one of the most efficient ways to counteract this threat. However, each and every original infective countermeasure suggested for asymmetric cryptosystems has been broken. Nowadays only two propositions for symmetric ciphers are still believed to be secure. Our paper presents the first attacks on both infective symmetric implementations, thus proving that these propositions rely on incomplete security analyses. By breaking the two last surviving infective methods, this paper shows once again that it is very difficult to design a secure infective countermeasure.

At CHES 2008, Vigilant proposed an efficient way of implementing a CRT-RSA resistant against Fault Analysis. In this paper, we investigate the fault-resistance of this scheme and we show that it is not immune to fault injection. Indeed, we highlight two weaknesses which can lead an attacker to recover the whole private key by using only one faulty signature. We also suggest some modifications with a negligible cost to improve the fault-resistance of Vigilant's scheme. Therefore the scheme including modifications remains suited to embedded device constraints.

On smart card environment, speed and memory optimization of cryptographic algorithms are an ongoing preoccupation. In addition, there is the necessity to protect the device against various attacks. In this paper we present a fault attack detection scheme for the AES using digest values. They are deduced from the mathematical description of each AES individual transformation. The security of our countermeasure is proved in a realistic fault model. Moreover we show that it can be combined with data masking to thwart efficiently both FA and DPA. Eventually, implementations of our method are presented, showing that it can be an interesting alternative to the traditional doubling countermeasure method.

Nowadays, side channel attacks allow an attacker to recover secrets stored in embedded devices more efficiently than any other kind of attack. Among the former, fault attacks (FA) and single power analysis (SPA) are probably the most effective: when applied to straightforward implementations of the RSA cryptosystem, only one execution of the algorithm is required to recover the secret key. Over recent years, many countermeasures have been proposed to prevent side channel attacks on RSA. Regarding fault attacks, only one countermeasure offers effective protection and it can be very costly. In this paper, we focus on a means to counteract fault attacks by presenting a new way of implementing exponentiation algorithms. This method can be used to obtain fast FA-resistant RSA signature generations in both the straightforward method and Chinese remainder theorem modes. Moreover, as it has been shown that fault attacks can benefit from the weaknesses introduced by some SPA countermeasures, we ensure that our method resists SPA and, thus, does not require supplementary SPA countermeasures