This is an introduction to the Classic Paper on MOSFET scaling by R. Dennard et al., Design of Ion-Implanted MOSFET's with Very Small Physical Dimensions,' published in the IEEE Journal of Solid-State Circuits in October 1974. The history of scaling and its application to very large scale integration (VLSI) MOSFET technology is traced from 1970 to 1998. The role of scaling in the profound improvements in power delay product over the last three decades is analyzed in basic terms.

The Esaki diode is a potentially low-cost, high-speed two-terminal device exhibiting a short-circuit-stable negative resistance over a portion of its volt-ampere characteristic. By proper biasing and loading, it can be used to perform power amplification and memory functions. In this paper, a variety of digital computer circuits (a result of an early exploratory program) is described which utilizes the above properties. In particular, shift registers, triggers, and counters are presented. The following shift registers are described: 1) A register which consists of one Esaki diode and one conventional diode per stage. Shifting is accomplished with a two-phase square-wave drive. The Esaki diode provides memory and power gain, and the conventional diode provides a unilateral flow of information. 2) A register which combines Esaki diodes with square-loop ferromagnetic cores. Again the Esaki diode provides memory and power gain. Upon application of a single-phase drive, the cores perform a gating operation depending upon the state of the diodes. 3) With the use of Esaki diode-transistor combinations, high-speed circuits are obtained which depend upon the Esaki diodes primarily for memory and the transistors for power gain and unilateral flow of information. The flip-flop and counter circuits to be presented are the following: 1) A binary counter using Esaki diodes with magnetic cores; 2) high-speed flipflops using Esaki diode-transistor combinations.