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Andrea Pacelli

dblp:15/6143 · DBLP profile ↗
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4ranked-venue papers
2as first author
0since 2021 · last 2011
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 2 first-authorHuman-computer interaction and ubiquitous computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 56% Electronic design automation · 44%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › semiconductor device modeling
compact modeling
0.012000
Generation of equivalent circuits from physics-based devicesimulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000
Electronic design automation › technology computer-aided design
device simulation
0.012000
Generation of equivalent circuits from physics-based devicesimulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2000

Methods — techniques the papers use, named apart from their topics

small-signal dc simulation · 0.0functional region partitioning · 0.0
YearPublicationVenuePosition
2011 Patents and intellectual property in entrepreneurship education in computing at Hofstra University
abstract
Entrepreneurship is an integral part of the computing education at Hofstra University and consists of: (i) two optional, specialization-type programs as part of undergraduate degrees that target students with strong entrepreneurial interests, and (ii) open seminars and enrichment modules, exposing all majors to entrepreneurial ideas and activities while attempting to spark their creativity and drive for innovation. To educate students and help them understand the purpose, procedures, cost and legal implications of patenting and intellectual property issues and to give them first-hand experience in these subjects, we have included “patents and intellectual property” as one of the facets of the new programs and activities. In this paper, we present the implementation details and we summarize the experiences and practices and draw conclusions. Adoption of modules at Qatar University illustrates the generality and transferability of the approach.
Gerda Kamberova, Andrea Pacelli, John Impagliazzo, Edward H. Currie, Simona Doboli
FIE2
2004 A practical approach to modeling skin effect in on-chip interconnects
abstract
A compact modeling methodology for the skin effect in conductors with rectangular cross section is presented. Possible equivalent circuit topologies are reviewed, and their calibration on numerical simulation is discussed, highlighting the shortcomings of conventional calibration procedures. A new approach, based on the direct fitting of the impedance transfer function to numerical simulations, is shown to offer excellent accuracy for a wide range of cross-sectional wire aspect ratios. The new formulation also obviates the need for separating the wire internal and external inductances which is a prerequisite for all published models. Finally, a practical implementation of the model as an RL parallel network is presented.
Bhaskar Mukherjee, Andrea Pacelli
ACM Great Lakes Symposium on VLSI3
2002 A local circuit topology for inductive parasitics
abstract
A novel circuit topology for inductive coupling between interconnecting wires is presented. The model is local, i.e., only coupling between neighboring wires is explicitly modeled. However, the topology accounts for long-range coupling by propagating the vector potential from one wire to the next. Examples of model calibration, both directly from layout and as model-order reduction of a given inductance matrix, are presented for simple wiring structures.
Andrea Pacelli
ICCAD1
2000 Generation of equivalent circuits from physics-based devicesimulation
abstract
A novel technique for the numerical extraction of equivalent circuits from physics-based device simulation is presented. The method is based on the partitioning of the device into functional regions, each corresponding to a circuit block. All the circuit elements have a clear physical interpretation. Element values are directly obtained from small-signal dc device simulation. The method generates equivalent circuits of a complexity similar to the traditional approach, with model generation times comparable with those of black-box and physics-based device models. Applications to one-dimensional pn junctions and bipolar transistors are presented, discussing the extraction algorithm in detail.
Andrea Pacelli, Marco Mastrapasqua, Serge Luryi
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1