Demo Data from EDBT 2026 / reviewers in the wild / expert
Inhwan Lee
dblp:15/6144
· DBLP profile ↗
7ranked-venue papers
5as first author
2since 2021 · last 2025
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 5 · 4 first-author · 1 since 2021Systems, architecture and hardware · 3 · 2 first-author · 2 since 2021Security and privacy · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Memory systems · 50% Hardware accelerators and domain-specific architectures · 43% Integrated circuit design · 6% | |
| Software engineering, system software, and programming languages
2 papers |
Debugging and program repair · 100% |
Topics — the 10 heaviest of 10, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems
DRAM |
0.7 | 1 | 2023 | In-Memory Neural Network Accelerator based on eDRAM Cell with Enhanced Retention Time · DAC 2023 |
Memory systems › DRAM › DRAM architecture
embedded DRAM |
0.7 | 1 | 2023 | In-Memory Neural Network Accelerator based on eDRAM Cell with Enhanced Retention Time · DAC 2023 |
Hardware accelerators and domain-specific architectures › machine learning accelerator
in-memory computing accelerator |
0.7 | 1 | 2023 | In-Memory Neural Network Accelerator based on eDRAM Cell with Enhanced Retention Time · DAC 2023 |
Hardware accelerators and domain-specific architectures
machine learning accelerator |
0.7 | 1 | 2023 | In-Memory Neural Network Accelerator based on eDRAM Cell with Enhanced Retention Time · DAC 2023 |
Integrated circuit design › parasitic capacitance
coupling capacitance |
0.2 | 1 | 2023 | In-Memory Neural Network Accelerator based on eDRAM Cell with Enhanced Retention Time · DAC 2023 |
Memory systems
processing-in-memory |
0.2 | 1 | 2023 | In-Memory Neural Network Accelerator based on eDRAM Cell with Enhanced Retention Time · DAC 2023 |
Debugging and program repair
fault localization |
0.0 | 1 | 2000 | Diagnosing Rediscovered Software Problems Using Symptoms · IEEE Trans. Software Eng. 2000 |
Debugging and program repair
root cause analysis |
0.0 | 1 | 2000 | Diagnosing Rediscovered Software Problems Using Symptoms · IEEE Trans. Software Eng. 2000 |
Hardware reliability and fault tolerance
reliability modeling |
0.0 | 1 | 1995 | Software Dependability in the Tandem GUARDIAN System · IEEE Trans. Software Eng. 1995 |
Hardware reliability and fault tolerance
software fault tolerance |
0.0 | 1 | 1995 | Software Dependability in the Tandem GUARDIAN System · IEEE Trans. Software Eng. 1995 |
Methods — techniques the papers use, named apart from their topics
reliability modeling · 0.0field failure data analysis · 0.0trace analysis · 0.0fingerprinting · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | An eDRAM Digital In-Memory Neural Network Accelerator for High-Throughput and Extended Data Retention TimeabstractComputing-in-Memory (CIM) optimizes multiply-and-accumulate (MAC) operations for energy-efficient acceleration of neural network models. While SRAM has been a popular choice for CIM designs due to its compatibility with logic processes, its large cell size restricts storage capacity for neural network parameters. Consequently, gain-cell eDRAM, featuring memory cells with only 2–4 transistors, has emerged as an alternative for CIM cells. While digital CIM (DCIM) structure has been actively adopted in SRAM-based CIMs for better accuracy and scalability than analog CIMs (ACIM), previous eDRAM-based CIMs still employed ACIM structure since the eDRAM CIM cells were not able to perform a complete digital logic operation. In this paper, we propose an eDRAM bit cell for more efficient DCIM operations using only 4 transistors. The proposed eDRAM DCIM structure also maintains consistent and accurate output values over time, improving retention times compared to previous eDRAM ACIM designs. We validate our approach by fabricating an eDRAM DCIM macro chip and conducting hardware validation experiments, measuring retention time and neural network accuracy. Experimental results show that the proposed eDRAM DCIM achieves 3× longer retention time than state-of-the-art eDRAM ACIM designs, along with higher throughput without accuracy loss. Inhwan Lee, Jehun Lee, Jaeyong Jang, Jae-Joon Kim |
DATE | 1 |
| 2023 | In-Memory Neural Network Accelerator based on eDRAM Cell with Enhanced Retention TimeabstractLogic compatible eDRAM cell-based computing-in-memory (CIM) neural network accelerators have been actively studied as an energy-efficient neural network computing platform thanks to their small cell size and low static power compared to SRAM. However, previous eDRAM-based CIM accelerators suffer from significant accuracy degradation caused by process, voltage, temperature (PVT) variations and short retention time. To overcome the issues, we introduce a PVT-variation tolerant capacitive coupling-based eDRAM cell that has a much longer retention time than previous works. Simulation results show that the proposed eDRAM cell has up to 50× higher retention time compared to the state-of-the-art designs. Inhwan Lee, Eunhwan Kim, Nameun Kang, Hyunmyung Oh, Jae-Joon Kim |
DAC | 1 |
| 2001 | A Procedure-Based Dynamic Software UpdateabstractThis paper presents a method to update a single or multiple procedures of running software, without stopping the software, by directly modifying a part of the process address space. The paper addresses two issues for procedure-based dynamic software update. First, the paper presents a well-defined sequence to perform an update while ensuring correct operation and small performance loss. Second the paper provides a solution for how to make the new version procedure work correctly in the address space of the old version process. The method is illustrated in the SUN Solaris environment. Using the method can reduce the downtime caused by software upgrade when changes are limited to text and local data. Janghoon Lyu, Yongsub Kim, Inhwan Lee |
DSN | 4 |
| 2000 | Diagnosing Rediscovered Software Problems Using SymptomsabstractThis paper presents an approach to automatically diagnosing rediscovered software failures using symptoms, in environments in which many users run the same procedural software system. The approach is based on the observation that the great majority of field software failures are rediscoveries of previously reported problems and that failures caused by the same defect often share common symptoms. Based on actual data, the paper develops a small software failure fingerprint, which consists of the procedure call trace, problem detection location, and the identification of the executing software. The paper demonstrates that over 60 percent of rediscoveries can be automatically diagnosed based on fingerprints; less than 10 percent of defects are misdiagnosed. The paper also discusses a pilot that implements the approach. Using the approach not only saves service resources by eliminating repeated data collection for and diagnosis of reoccurring problems, but it can also improve service response time for rediscoveries. Inhwan Lee, Ravishankar K. Iyer |
IEEE Trans. Software Eng. | 1 |
| 1995 | Analysis of failures in the Tandem NonStop-UX Operating SystemabstractThe paper presents results from an investigation of failures in several releases of Tandem's NonStop-UX Operating System, which is based on Unix System V. The analysis covers software failures from the field and failures reported by Tandem's test center. Fault classification is based on the status of the reported failures, the detection point of the errors in the operating system code, the panic message generated by the systems, the module that was found to be faulty, and the type of programming mistake. This classification reveals which modules in the operating system generate the most faults and the modules in which most errors are detected. We also present distributions of the failure and repair times including inter arrival time of unique failures and time between duplicate failures. These distributions, unlike generic time distributions, such as time between failures, help characterize the software quality. Distribution of the repair times emphasizes the repair process and the factors influencing repair. Distribution of up time of the systems before the panic reveals the factors triggering the panic. Anshuman Thakur, Ravishankar K. Iyer, Luke T. Young, Inhwan Lee |
ISSRE | 4 |
| 1995 | Software Dependability in the Tandem GUARDIAN SystemabstractBased on extensive field failure data for Tandem's GUARDIAN operating system, the paper discusses evaluation of the dependability of operational software. Software faults considered are major defects that result in processor failures and invoke backup processes to take over. The paper categorizes the underlying causes of software failures and evaluates the effectiveness of the process pair technique in tolerating software faults. A model to describe the impact of software faults on the reliability of an overall system is proposed. The model is used to evaluate the significance of key factors that determine software dependability and to identify areas for improvement. An analysis of the data shows that about 77% of processor failures that are initially considered due to software are confirmed as software problems. The analysis shows that the use of process pairs to provide checkpointing and restart (originally intended for tolerating hardware faults) allows the system to tolerate about 75% of reported software faults that result in processor failures. The loose coupling between processors, which results in the backup execution (the processor state and the sequence of events) being different from the original execution, is a major reason for the measured software fault tolerance. Over two-thirds (72%) of measured software failures are recurrences of previously reported faults. Modeling, based on the data, shows that, in addition to reducing the number of software faults, software dependability can be enhanced by reducing the recurrence rate.> Inhwan Lee, Ravishankar K. Iyer |
IEEE Trans. Software Eng. | 1 |
| 1992 | Analysis of software halts in the tandem GUARDIAN operating systemabstractA systematic methodology is given to investigate the dependability of operational software. The methodology combines several techniques. Time series analysis is used to characterize the occurrence of software failures. Markov reward modeling is used to determine the loss in service due to failures of software components, and to identify major bottlenecks. The effectiveness of built-in fault tolerance is also evaluated. The methodology is illustrated using the software halt data from the Tandem GUARDIAN operating system. The results show that the occurrences of software halts are not correlated with each other in time. Interrupt a handling and memory management are found to be the major bottlenecks in the measured system. The fault tolerance in the measured system was shown to reduce the service loss by nearly 90%.> Inhwan Lee, Ravishankar K. Iyer |
ISSRE | 1 |