This paper presents the design and the measured performances of the AltiKa radiometer Flight Model for SARAL (CNES and ISRO) mission: radiometric sensitivity, absolute accuracy after on ground calibration, and auto-compatibility tests with the altimeter function are described.

Altika instrument is a new class of altimeter allowing the compatibility of the altimetric payload (altimeter, radiometer, localisation system) with a micro-satellite. The key feature of the concept is the selection of the Ka-band for the single-frequency altimeter that avoids the need for a second frequency (necessary with Ku-band) to correct the ionosphere delay, and allows the same antenna to be shared by the altimeter and the radiometer to ease payload accommodation. This concept also improves the range measurement accuracy in a ratio of 3:1 thanks to a wider bandwidth and to a better pulse to pulse echo decorrelation. Development of AltiKa instrument (integrated altimeter and radiometer) has started in Thales Alenia Space in January 2005 for a FM delivery end of 2008 and a launch in 2009. This paper reminds instrument design, key technologies involved, altimeter and radiometer parameters, expected altimeter and radiometer performances, status of the instrument development and available test results.

To ensure low power consumption while maintaining flexibility and performance, future Systems-on-Chip (SoC) will combine several types of processor cores and data memory units of widely different sizes. To interconnect the IPs of these heterogeneous platforms, Networks-on-Chip (NoC) have been proposed as an efficient and scalable alternative to shared buses. NoCs can provide throughput and latency guarantees by establishing virtual circuits between source and destination. State-of-the-art NoCs currently exploit Time-Division Multiplexing (TDM) to share network resources among virtual circuits, but this typically results in high network area and energy overhead with long circuit set-up time. We propose an alternative solution based on Spatial Division Multiplexing (SDM). This paper describes our design of an SDM-based network, discusses design alternatives for network implementation and shows why SDM can be better adapted to NoCs than TDM in a specific context. Our case study clearly illustrates the advantages of our technique over TDM in terms of energy consumption, area overhead, and flexibility. A comparison is also performed with a State-of-the-Art industrial reference NoC: Arteris.

This paper describes the AltiKa project : the mission, the instrument design, the altimeter parameters, the anticipated performances, the key technologies involved, the whole payload design and budgets, and the micro-sat configuration. A status of AltiKa development is also given.

Users expect future handheld devices to provide extended multimedia functionality and have long battery life. This type of application imposes heavy constraints on performance and power consumption and forces designers to optimize all parts of their platform. Evaluating the overall platform power breakdown is therefore critical to determine where to spend the efforts on power optimization. Surprisingly, few studies exist on that topic and decisions generally rely on common belief. We have realized a complete power breakdown for a realistic platform to identify the major power bottlenecks. This paper presents this power assessment of a realistic heterogeneous network on chip platform including processors, network and data/instruction memory hierarchy, running a video processing chain from camera to display. Our power breakdown identifies the main bottlenecks in the memory hierarchy and the foreground memory, and shows that global interconnect is not that critical for a well-optimized application mapping.

Users expect future handheld devices to provide extended multimedia functionality and have long battery life. This type of application imposes heavy constraints on both (realtime) performance and energy consumption and forces designers to optimise all parts of their platform. In this experiment we focus on the different processor core design options for embedded platforms, including the effect of instruction memory hierarchy on the energy consumption. The results show that significant improvements for energy efficiency and/or performance over currently used RISC or VLIW processors can be achieved. We conclude, based on concrete data for a realistic application, that different styles, including both configurable hardware and instruction set processors, find their way into heterogeneous platforms and designers need to be aware of the trade-offs. Secondly, we show for the same application task that a heavily optimised instruction/configuration memory hierarchy can significantly reduce the energy consumption of this part, so it forms a crucial part of every energy aware design.

We discuss Procedural Reasoning System (PRS) as a high-level control and supervision language adapted to autonomous robots to represent and execute procedures, scripts and plans in dynamic environments. We discuss the main reasons why PRS is well suited for this type of application: (1) The semantics of its plan (procedure) representation, which is important for plan execution and goal refinement; (2) Its ability to construct and act on partial (rather than complete) plans; (3) Its ability to pursue goal-directed tasks while at the same time being responsive to changing patterns of events in bounded time; (4) Its facilities for managing multiple tasks in real-time; (5) Its default mechanisms for handling stringent real-time demands of its environment; and (6) Its meta-level (or reflective) reasoning capabilities. C-PRS has been used to implement an embedded control and supervision system for autonomous mobile robots in two different experimentations that we briefly present. We conclude with some suggestions to further develop C-PRS and with a short review of related work.

This paper presents an approach we have recently developed for multi-robot cooperation. It is based on a paradigm where robots incrementally merge their plans into a set of already coordinated plans. This is done through exchange of information about their current state and their future actions. This leads to a generic framework which can be applied to a variety of tasks and applications. The paradigm, called plan-merging paradigm, is presented and illustrated through its application to planning, execution and control of a large fleet of a autonomous mobile robots for load transport tasks in a structured environment.

This paper presents an implemented system which allows one to run a fleet of autonomous mobile robots in a route network with a very limited centralized activity. The robots are provided with all the necessary ingredients for planning and executing navigation missions in a multi-robot context. Multi-robot cooperation is based on a generic paradigm called plan-merging paradigm, where robots incrementally merge their plans into a set of already coordinated plans. The robot architecture is derived from the generic architecture developed at LAAS. A 3D graphic environment system allows one to display a complete system composed of a dozen (or more) robots, each running on an independent workstation. An example is presented together with numerical results on the system behavior.