Demo Data from EDBT 2026 / reviewers in the wild / expert
Xiao-Ping Cui
dblp:150/5388
· DBLP profile ↗
5ranked-venue papers
3as first author
0since 2021 · last 2017
0000-0003-4374-6227ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 2Systems, architecture and hardware · 2 · 2 first-authorDatabases, data management, data science and information retrieval · 1Theory of computation · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Integrated circuit design · 100% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › digital circuit design
arithmetic circuit design |
0.5 | 2 | 2017 | High Performance Parallel Decimal Multipliers Using Hybrid BCD Codes · IEEE Trans. Computers 2017 A Modified Partial Product Generator for Redundant Binary Multipliers · IEEE Trans. Computers 2016 |
Integrated circuit design
digital circuit design |
0.5 | 2 | 2017 | High Performance Parallel Decimal Multipliers Using Hybrid BCD Codes · IEEE Trans. Computers 2017 A Modified Partial Product Generator for Redundant Binary Multipliers · IEEE Trans. Computers 2016 |
Integrated circuit design › digital circuit design › arithmetic circuit design
multiplier design |
0.2 | 1 | 2016 | A Modified Partial Product Generator for Redundant Binary Multipliers · IEEE Trans. Computers 2016 |
Integrated circuit design › digital circuit design › arithmetic circuit design › multiplier design
redundant binary multiplier |
0.2 | 1 | 2016 | A Modified Partial Product Generator for Redundant Binary Multipliers · IEEE Trans. Computers 2016 |
Integrated circuit design › digital arithmetic circuits › decimal arithmetic
BCD arithmetic |
0.1 | 1 | 2017 | High Performance Parallel Decimal Multipliers Using Hybrid BCD Codes · IEEE Trans. Computers 2017 |
Integrated circuit design › digital circuit design › arithmetic circuit design
partial product generation |
0.1 | 1 | 2016 | A Modified Partial Product Generator for Redundant Binary Multipliers · IEEE Trans. Computers 2016 |
Methods — techniques the papers use, named apart from their topics
signed-digit radix-10 recoding · 0.3parallel prefix/carry-select adder · 0.3carry-save algorithm · 0.3redundant binary encoding · 0.2partial product accumulation · 0.2modified booth encoding · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2017 | High Performance Parallel Decimal Multipliers Using Hybrid BCD CodesabstractA parallel decimal multiplier with improved performance is proposed in this paper by exploiting the properties of three different binary coded decimal (BCD) codes, namely the redundant BCD excess-3 code (XS-3), the overloaded decimal digit set (ODDS) code and the BCD-4221/5211 code. The signed-digit radix-10 recoding is used to recode the BCD multiplier to the digit set [-5, 5] from [0, 9]. The redundant BCD XS-3 code is adopted to generate the multiplicand multiples in a carry-free manner. The XS-3 coded partial products (PPs) are converted to ODDS PPs to fit binary partial product reduction (PPR). In this paper, a regular decimal PPR tree using ODDS and BCD-4221/5211 codes is proposed; it consists of a binary PPR tree block, a non-fixed size BCD-4221 counter block and a BCD-4221/5211 PPR tree block. The decimal carry-save algorithm based on BCD-4221/5211 is used in the PPR tree to obtain high performance multipliers. Moreover, an improved PPG circuit and an improved parallel prefix/carry-select decimal adder are proposed to further improve the performance of the proposed multipliers. Analysis and comparison using the 45 nm technology show that the proposed decimal multipliers are faster and require less hardware area than previous designs found in the technical literature. Xiao-Ping Cui, Wenwen Dong, Weiqiang Liu 0001, Earl E. Swartzlander Jr., Fabrizio Lombardi |
IEEE Trans. Computers | 1 |
| 2016 | A Parallel Decimal Multiplier Using Hybrid Binary Coded Decimal (BCD) CodesabstractA parallel decimal multiplier is proposed in this paper to improve performance by mainly exploiting the properties of three different binary coded decimal (BCD) codes, namely the redundant BCD excess-3 code (XS-3), the overloaded decimal digit set (ODDS) code and BCD-4221/5211 code, hence this design is referred to as hybrid. The signed-digit radix-10 recoding with the digit set {-5, 5} and the redundant BCD excess-3 (XS-3) representations are used for partial product (PP) generation. In this paper, a new decimal partial product reduction (PPR) tree is proposed, it consists of a binary PPR tree block, a nonfixed size BCD-4221 counter correction block and a BCD-4221/5211 decimal PPR tree block. Analysis and comparison using the logical effort model and 45 nm technology show that the proposed decimal multiplier is faster compared with previous designs found in the technical literature. Xiao-Ping Cui, Weiqiang Liu 0001, Dong Wenwen, Fabrizio Lombardi |
ARITH | 1 |
| 2016 | A Modified Partial Product Generator for Redundant Binary MultipliersabstractDue to its high modularity and carry-free addition, a redundant binary (RB) representation can be used when designing high performance multipliers. The conventional RB multiplier requires an additional RB partial product (RBPP) row, because an error-correcting word (ECW) is generated by both the radix-4 Modified Booth encoding (MBE) and the RB encoding. This incurs in an additional RBPP accumulation stage for the MBE multiplier. In this paper, a new RB modified partial product generator (RBMPPG) is proposed; it removes the extra ECW and hence, it saves one RBPP accumulation stage. Therefore, the proposed RBMPPG generates fewer partial product rows than a conventional RB MBE multiplier. Simulation results show that the proposed RBMPPG based designs significantly improve the area and power consumption when the word length of each operand in the multiplier is at least 32 bits; these reductions over previous NB multiplier designs incur in a modest delay increase (approximately 5 percent). The power-delay product can be reduced by up to 59 percent using the proposed RB multipliers when compared with existing RB multipliers. Xiao-Ping Cui, Weiqiang Liu 0001, Xin Chen 0039, Earl E. Swartzlander Jr., Fabrizio Lombardi |
IEEE Trans. Computers | 1 |
| 2014 | Social Book Search Reranking with Generalized Content-Based FilteringabstractSemantically searching and navigating products (e.g., on Taobao.com or Amazon.com) with professional metadata and user-generated content from social media is a hot topic in information retrieval and recommendation systems, while most existing methods are specifically designed as a purely searching system. In this paper, taking Social Book Search as an example, we propose a general search-recommendation hybrid system for this topic. Firstly, we propose a Generalized Content-Based Filtering (GCF) model. In this model, a preference value, which flexibly ranges from 0 to 1, is defined to describe a user's preference for each item to be recommended, unlike conventionally using a set of preferable items. We also design a weighting formulation for the measure of recommendation. Next, assuming that the query in a searching system acts as a user in a recommendation system, a general reranking model is constructed with GCF to rerank the initial resulting list by utilizing a variety of rich social information. Afterwards, we propose a general search-recommendation hybrid framework for Social Book Search, where learning-to-rank is used to adaptively combine all reranking results. Finally, our proposed system is extensively evaluated on the INEX 2012 and 2013 Social Book Search datasets, and has the best performance ([email protected]) on both datasets compared to other state-of-the-art systems. Moreover, our system recently won the INEX 2014 Social Book Search Evaluation. Bowen Zhang 0011, Xu-Cheng Yin, Xiao-Ping Cui, Jiao Qu, Bin Geng, Hongwei Hao |
CIKM | 3 |
| 2014 | Social Book Search with Pseudo-Relevance Feedback
Bin Geng, Jiao Qu, Bowen Zhang 0011, Xiao-Ping Cui, Xu-Cheng Yin |
ICONIP (2) | 5 |