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Simon Pichette

dblp:151/6456 · DBLP profile ↗
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2ranked-venue papers
1as first author
1since 2021 · last 2023
0000-0002-5600-9122ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author · 1 since 2021Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%
Artificial intelligence
1 paper
Knowledge representation and reasoning · 100%
Databases, data mining, and information retrieval
1 paper
Recommender systems · 100%

Topics — the 3 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Knowledge, reasoning and agents › Knowledge representation and reasoning
case-based reasoning
0.712023
Knowledge-Intensive Diagnostics Using Case-Based Reasoning and Synthetic Case Generation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023
Electronic design automation › hardware verification and test › board-level testing
board-level fault diagnosis
0.712023
Knowledge-Intensive Diagnostics Using Case-Based Reasoning and Synthetic Case Generation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023
Electronic design automation
hardware verification and test
0.712023
Knowledge-Intensive Diagnostics Using Case-Based Reasoning and Synthetic Case Generation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2023

Methods — techniques the papers use, named apart from their topics

simulation · 2.0knowledge modeling · 2.0case-based reasoning · 2.0
YearPublicationVenuePosition
2023 Knowledge-Intensive Diagnostics Using Case-Based Reasoning and Synthetic Case Generation
abstract
Due to commercial pressures, North-American printed circuit-board assembly manufacturers have had to reposition themselves in the more difficult market segment of lower volume, higher complexity products, also called high-mix, low-volume (HMLV). The high per-unit costs of these products justify substantial diagnosis and repair efforts when defects are detected in production. Although automated diagnostics is desirable, the low production volumes impose severe limits on available data. We propose a novel approach based on knowledge modeling and case-based reasoning for automated diagnosis of assembled printed circuit boards in an HMLV production environment. Our hybrid approach can overcome the knowledge-acquisition bottleneck even in a data-poor environment. The proposed approach does not require contributions from product designers or experts and is designed to operate using only information available during manufacturing. Our test results show that our diagnostic system can detect, locate and classify all single faults and multiple faults affecting up to three neighboring nodes with a better success rate than the reference commercial tool. Moreover, case base data, including board layout information and user feedback from previous repairs, is used to feed a recommender system to provide repair suggestions. A production and repair data simulator is described and used to evaluate the recommender system’s effectiveness.
Simon Pichette, Claude Thibeault
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
2014 Multi-abstraction level signature generation and comparison based on radiation single event upset
abstract
Whereas the use of FPGAs in aerospace applications is increasing, concerns about its sensitivity to radiations more particularly the single event upsets (SEU) in SRAM-based FPGA is enhanced as well. To ensure hardness assurance, radiation sensitivity should be estimated at different stages of the system development cycle. In this paper, we present a multi-abstraction level signature generation based on fault injection using fault simulation, fault emulation and radiation testing in order to build an accurate representation of the design faulty behavior. These signatures, which can be seen as high-level fault models, help the designer make decisions on the use (or not) of rad-hard components and the adequate mitigation technique very early in the design process. Results from the different types of signatures are compared. It first shows that the type of resources used to implement a module (e.g. multiplier) may influence its behavior when affected by an SEU. It also reveals that most of the faulty values observed during radiation testing appear in the simulation-based and emulation-based signatures, but that their frequency of occurrence can differ. Finally, limitations of some commercial tools to identify critical bits are investigated.
Christelle Hobeika, Simon Pichette, M. A. Leonard, Claude Thibeault, Jean-François Boland, Yves Audet
IOLTS2