Lightweight anonymity protocols provide a well-balanced anonymity and performance by encrypting and decrypting only packet headers under the active and local adversary threat model. Among them, PHI and dPHI are promising in universally providing relationship anonymity. However, when overlaid onto IP, they are susceptible to the router skipping attack, where honest routers are skipped by malicious routers. Although this attack poses a significant threat to anonymity, its prevention is challenging due to the lack of path integrity in these protocols. To address this limitation, this paper integrates path validation into dPHI. This integration is non-trivial, as anonymity and path validation are inherently contradictory requirements. This paper designs and implements pPHI, a novel protocol, and analyzes pPHI in terms of security and performance.

Although secure channels are an essential building block of data plane protocols, their realization on programmable switches remains a significant challenge. Typical approaches offload the computation of authenticated encryption to external devices, compromising either speed or flexibility. Similarly, recent efforts to implement existing constructions of authenticated encryption on the switches face performance limitations due to the numerous recirculations required. This paper presents a novel construction and implementation of authenticated encryption on the switches. It incorporates two instances of Chaskey, a PRF with high compatibility with the switches, to achieve both confid-entiality and integrity with fewer recirculations, integrated using the EtM approach. Multi-block data are handled in CCM mode, implemented through a block rotation mechanism. Furthermore, a divide-and-conquer method realized through packet multi-furcation and rendezvous further reduces recirculations. The construction is verified for security, and its implementation on a Tofino 2 switch exhibits substantial performance improvements.

Programmable switches offer a promising platform for fast and flexible in-network computing. However, a standard mechanism, packet recirculation, degrades throughput due to bandwidth consumption caused by the loopback of not only packet headers but also cumbersome payloads. This paper proposes P4QRS, a mechanism that reduces payload recirculation by retaining payloads within the switch. Specifically, P4QRS bifurcates packets into headers and payloads, which undergo the computation process through pipelines and the buffering process leveraging the switch’s queue behavior, respectively. The headers and payloads then rendezvous for reassembly into complete packets to be sent out. To validate its effectiveness, we evaluated P4QRS through both an analytical model and implementation on state-of-the-art hardware programmable switches. Our results demonstrate that P4QRS operates stably and significantly accelerates complex in-switch computations. Moreover, we address packet reordering, which is a fundamental concern arising because P4QRS performs payload buffering on a per-packet basis rather than per-flow. After identifying the mechanism for developing packet reordering in three stages, we design, implement, and evaluate mitigation strategies targeting each stage. These strategies effectively suppress packet reordering in both flow-aware and flow-unaware cases.

Secure communication relies heavily on authenticated encryption (AE). This poster implements ChaCha20Poly1305, a widely-used AE scheme, on a smartNIC, which is particularly beneficial for high-speed networks. The key design rationale is manually optimizing data layout on hierarchical memory devices on the smartNIC. Our implementation achieves$5.67 \times 10^{6}$and$0.58 \times 10^{6}$packets/s for 64-byte and 1024-byte packets, respectively. As a use case of our AE implementation, we also implement a subset of TLS.

Recent work shows that programmable switches can effectively detect attack traffic, such as denial-of-service attacks in the midst of high-volume network traffic. However, these techniques primarily rely on sampling or sketch-based data structures, which can only be used to approximate the characteristics of dominant flows in the network. As a result, such techniques are unable to effectively detect low-volume attacks that stealthily add only a few packets to the network. Our work explores how the combination of programmable switches, Smart network interface cards, and hosts can enable fine-grained analysis of every flow in a network, even those with only a small number of packets. We focus on analyzing packets at the start of each flow, as those packets often can help indicate whether a flow is benign or suspicious. We propose a unified architecture that spans the full programmable dataplane to take advantage of the strengths of each type of device. We are developing new filter data structures to efficiently track flows on the switch, dataplane-based communication protocols to quickly coordinate between devices, and caching approaches on the SmartNIC that help minimize the traffic load reaching the host. Our preliminary prototype can handle the full pipe bandwidth of 1.4 Tbps of traffic entering the Tofino switch, forward only 20 Gbps to the SmartNIC, and minimize the traffic load to 5 Gbps reaching the host due to our efficient flow filter, packet batching, and SmartNIC-based cache.

Programmable switches are promising platforms for fast and flexible in-network computation; however, a standard mechanism, packet recirculation, degrades throughput due to bandwidth consumption caused by the loopback of not only packet headers but also cumbersome payloads. This paper proposes$\mathrm{P}^{4} \text{QRS}$, a mechanism for retaining payloads within the switch, reducing payload recirculations. Specifically,$\mathrm{P}^{4}$QRS bifurcates packets into headers and payloads, which undergo the computation process through pipelines and the buffering process leveraging the switch's queue behavior, respectively; they then rendezvous for reassembly into complete packets to be sent out. To validate its effectiveness, we evaluated$\mathrm{P}^{4}$QRS using an analytical model and implementation on state-of-the-art hardware programmable switches. Our evaluation shows that$\mathrm{P}^{4}$QRS operates stably and intrinsically boosts complex in-switch computations.

Quantum networks offer the capability of transferring quantum information among remote nodes leveraging the phenomenon of quantum entanglement. A key challenge is entanglement routing, which routes quantum entanglement efficiently in a quantum network to satisfy specific objectives. We focus on an interesting hypothesis that arises from the probabilistic nature of quantum entanglement: There is a tradeoff between accommodating a higher number of quantum entanglements (performance) and serving a broader range of node pairs (fairness). To confirm this hypothesis, we formulate entanglement routing as a multi-objective optimization problem. Our numerical analysis reveals that the solutions of the model form a Pareto frontier, thereby validating the hypothesis. Furthermore, we compare the performance of existing algorithms against this Pareto frontier to understand how the algorithms balance performance and fairness. Our findings contribute to designing entanglement routing algorithms.

A large portion of Internet traffic passes through middleboxes that read or modify messages. However, as more traffic is protected with TLS, middleboxes are becoming unable to provide their functions. To leverage middlebox functionality while preserving communication security, secure middlebox channel protocols have been designed as extensions of TLS. A key idea is that the endpoints explicitly incorporate middleboxes into the TLS handshake and grant each middlebox either the read or the write permission for their messages. Because each middlebox has the least data access privilege, these protocols are resilient against the compromise of a single middlebox. However, the existing studies have not comprehensively analyzed the communication security under the scenarios where multiple middleboxes are compromised. In this paper, we present novel attacks that break the security of the existing protocols under such scenarios and then modify maTLS, the state-of-the-art protocol, so that all the attacks are prevented with marginal overhead.

Consumer privacy leakage from data names poses a serious threat to Content-Centric Networking (CCN) networks. Obfuscating names is a promising countermeasure, and anonymizers with deterministic encryption schemes have been proposed to provide data privacy while enabling CCN features, such as in-network caching. Existing studies assume a weak threat model in which anonymizers are honest, and their obfuscation schemes are not resilient against privacy attacks such as name guessing attacks. This paper designs a name obfuscation framework based on the realistic assumption that anonymizers are semi-honest. The framework strengthens data privacy using multiple keys and separates obfuscation for prefixes and suffixes, and is implemented on a P4 switch to provide Tbps forwarding speed.

The paper presents a Tbps-class anonymity router that supports both an anonymity protocol and IP by leveraging a programmable switch. The key design issue is to place both the compute-intensive header decryption function for anonymity protocol forwarding and the memory-intensive IP forwarding function on the processing pipes of a switch with satisfying its hardware requirements. A prototype router on a programmable switch achieves Tbps-scale forwarding.

This paper proposes an IP forwarding information base (FIB) encoding leveraging an emerging data structure called a learned index , which uses machine learning to associate key-position pairs in a key-value store. A learned index for FIB lookups is expected to yield a more compact representation and faster lookups compared to existing FIBs based on tries or hash tables, at the cost of efficient FIB updates, which is difficult to support with a learned index. We optimize our implementation for lookup speed, exploiting that for efficient FIB lookups it is enough to approximate the key-position pairs with a piece-wise linear function, instead of having to learn the key-position pairs. The experiments using real BGP routing information snapshots suggest that the size of the proposed FIB is compact and lookup speed is sufficiently fast regardless of the length of matched prefixes.

Federated learning is a privacy-preserving learning system where participants locally update a shared model with their own training data. Despite the advantage that training data are not sent to a server, there is still a risk that a state-of-the-art model inversion attack, which may be conducted by the server, infers training data from the models updated by the participants, referred to as individual models. A solution to prevent such attacks is differential privacy, where each participant adds noise to the individual model before sending it to the server. Differential privacy, however, sacrifices the quality of the shared model in compensation for the fact that participants' training data are not leaked. This paper proposes a federated learning system that is resistant to model inversion attacks without sacrificing the quality of the shared model. The core idea is that each participant divides the individual model into model fragments, shuffles, and aggregates them to prevent adversaries from inferring training data. The other benefit of the proposed system is that the resulting shared model is identical to the shared model generated with the naive federated learning.

Conflict between the two TE (Traffic Engineering) techniques for EE (Energy Efficiency) and LB (Load Balancing) has been paid attention to. This is because the both objectives are difficult to simultaneously achieve due to that the both TE techniques control the routing matrix: power and link cost minimization. The goal of this paper is to show feasibility of achieving a fair tradeoff between these two inherently conflicting objectives by using a game theoretic approach and to develop an algorithm wherein EE and LB objectives are simultaneously achieved in a fair manner.

On the one hand packet-level caching of Information-Centric Networking (ICN) is a key to accommodating Video on Demand (VoD) movies thanks to its fine granularity caching, but on the other hand it would cause degradation in cache hit probability because each of packets constituting a content object is dealt individually. This paper analytically reveals that caching large content objects by using packet-level caching degrades caching hit probability.

Named data networking (NDN) has received considerable attention recently, mainly due to its built-in caching, which is expected to enable widespread and transparent operator-controlled caching. One of the important research challenges is to reduce the amount of power consumed by NDN networks as it has been shown that NDN's name prefix matching and caching are power-hungry. As a first step to achieving power-efficient NDN networks, in this paper, we develop a power consumption model of a multicore software NDN router. By applying this model to analyze how caching reduces power, we report that caching can reduce power consumption of an NDN network if the power consumption of routers is in proportion to their load and the computation of caching is as light as that of forwarding.

In-network caching in information centric networking (ICN) is considered as a promising approach to reducing energy consumption of an entire network. However, it is also considered as an energy consuming technique. These contradictory claims lead to one research question: Does caching really reduce the energy consumption of the entire network? To answer the question, we formulate an ICN network as an optimization problem with a realistic energy consumption model for an ICN router. By solving the formulation assuming that ICN forwarding software currently under development is used as a forwarding engine of an ICN router, we reveal that in-network caching alone does not reduce much energy but it enhances a currently developed green networking technique even though the forwarding engine is not fully optimized.