Demo Data from EDBT 2026 / reviewers in the wild / expert
Marek Konieczny
dblp:152/7714
· DBLP profile ↗
6ranked-venue papers
0as first author
4since 2021 · last 2024
0000-0002-1167-8568ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 2 since 2021Artificial intelligence and machine learning · 1Computer networks · 1 · 1 since 2021Software engineering, systems software and programming languages · 1Databases, data management, data science and information retrieval · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
5 papers |
Interconnection networks and networks-on-chip · 34% Electronic design automation · 24% Processor architecture and microarchitecture · 17% | |
| Computer networks
2 papers |
Routing and switching · 85% Datacenter networks · 15% | |
| Databases, data mining, and information retrieval
1 paper |
Data mining · 100% |
Topics — the 16 heaviest of 17, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Interconnection networks and networks-on-chip
network topology |
1.3 | 2 | 2024 | A High-Performance Design, Implementation, Deployment, and Evaluation of The Slim Fly Network · NSDI 2024 High-Performance Routing With Multipathing and Path Diversity in Ethernet and HPC Networks · IEEE Trans. Parallel Distributed Syst. 2021 |
Electronic design automation › physical design
routing |
0.9 | 2 | 2021 | High-Performance Routing With Multipathing and Path Diversity in Ethernet and HPC Networks · IEEE Trans. Parallel Distributed Syst. 2021 FatPaths: routing in supercomputers and data centers when shortest paths fall short · SC 2020 |
Data mining › structured data mining
graph mining |
0.5 | 1 | 2021 | GraphMineSuite: Enabling High-Performance and Programmable Graph Mining Algorithms with Set Algebra · Proc. VLDB Endow. 2021 |
Hardware accelerators and domain-specific architectures › graph processing accelerator
graph mining accelerator |
0.5 | 1 | 2021 | SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems · MICRO 2021 |
Processor architecture and microarchitecture
instruction set architecture |
0.5 | 1 | 2021 | SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems · MICRO 2021 |
Processor architecture and microarchitecture › instruction set architecture
ISA extension |
0.5 | 1 | 2021 | SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems · MICRO 2021 |
Interconnection networks and networks-on-chip › network topology
low-diameter topology |
0.5 | 1 | 2021 | High-Performance Routing With Multipathing and Path Diversity in Ethernet and HPC Networks · IEEE Trans. Parallel Distributed Syst. 2021 |
Electronic design automation › physical design › routing
multipath routing |
0.5 | 1 | 2021 | High-Performance Routing With Multipathing and Path Diversity in Ethernet and HPC Networks · IEEE Trans. Parallel Distributed Syst. 2021 |
Memory systems
processing-in-memory |
0.5 | 1 | 2021 | SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems · MICRO 2021 |
Routing and switching
multipath routing |
0.4 | 1 | 2020 | FatPaths: routing in supercomputers and data centers when shortest paths fall short · SC 2020 |
Routing and switching
routing |
0.4 | 1 | 2020 | FatPaths: routing in supercomputers and data centers when shortest paths fall short · SC 2020 |
High-performance computing › supercomputing
supercomputing systems |
0.2 | 1 | 2024 | A High-Performance Design, Implementation, Deployment, and Evaluation of The Slim Fly Network · NSDI 2024 |
Performance modeling and evaluation
benchmarking |
0.1 | 1 | 2021 | GraphMineSuite: Enabling High-Performance and Programmable Graph Mining Algorithms with Set Algebra · Proc. VLDB Endow. 2021 |
Interconnection networks and networks-on-chip › cluster interconnect
infiniband |
0.1 | 1 | 2021 | High-Performance Routing With Multipathing and Path Diversity in Ethernet and HPC Networks · IEEE Trans. Parallel Distributed Syst. 2021 |
Memory systems › processing-in-memory
near-memory processing |
0.1 | 1 | 2021 | SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems · MICRO 2021 |
Interconnection networks and networks-on-chip › high-speed networks
supercomputer interconnect |
0.1 | 1 | 2021 | High-Performance Routing With Multipathing and Path Diversity in Ethernet and HPC Networks · IEEE Trans. Parallel Distributed Syst. 2021 |
Methods — techniques the papers use, named apart from their topics
taxonomy · 1.0path diversity analysis · 1.0transport layer redesign · 0.9flowlet switching · 0.9performance evaluation · 0.8network design · 0.8set operations · 0.5cross-layer design · 0.5
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | A High-Performance Design, Implementation, Deployment, and Evaluation of The Slim Fly Network
Nils Blach, Maciej Besta, Daniele De Sensi, Jens Domke, Hussein Harake, Shigang Li 0002, Patrick Iff, Marek Konieczny, Kartik Lakhotia, Ales Kubicek, Marcel Ferrari, Fabrizio Petrini, Torsten Hoefler |
NSDI | 8 |
| 2021 | SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory SystemsabstractSimple graph algorithms such as PageRank have been the target of numerous hardware accelerators. Yet, there also exist much more complex graph mining algorithms for problems such as clustering or maximal clique listing. These algorithms are memory-bound and thus could be accelerated by hardware techniques such as Processing-in-Memory (PIM). However, they also come with non-straightforward parallelism and complicated memory access patterns. In this work, we address this problem with a simple yet surprisingly powerful observation: operations on sets of vertices, such as intersection or union, form a large part of many complex graph mining algorithms, and can offer rich and simple parallelism at multiple levels. This observation drives our cross-layer design, in which we (1) expose set operations using a novel programming paradigm, (2) express and execute these operations efficiently with carefully designed set-centric ISA extensions called SISA, and (3) use PIM to accelerate SISA instructions. The key design idea is to alleviate the bandwidth needs of SISA instructions by mapping set operations to two types of PIM: in-DRAM bulk bitwise computing for bitvectors representing high-degree vertices, and near-memory logic layers for integer arrays representing low-degree vertices. Set-centric SISA-enhanced algorithms are efficient and outperform hand-tuned baselines, offering more than 10 × speedup over the established Bron-Kerbosch algorithm for listing maximal cliques. We deliver more than 10 SISA set-centric algorithm formulations, illustrating SISA’s wide applicability. Maciej Besta, Raghavendra Kanakagiri, Grzegorz Kwasniewski, Rachata Ausavarungnirun, Jakub Beránek, Konstantinos Kanellopoulos, Kacper Janda, Zur Vonarburg-Shmaria, Lukas Gianinazzi, Ioana Stefan, Juan Gómez-Luna, Jakub Golinowski, Marcin Copik, Lukas Kapp-Schwoerer, Salvatore Di Girolamo, Nils Blach, Marek Konieczny, Onur Mutlu, Torsten Hoefler |
MICRO | 17 |
| 2021 | GraphMineSuite: Enabling High-Performance and Programmable Graph Mining Algorithms with Set AlgebraabstractWe propose GraphMineSuite (GMS): the first benchmarking suite for graph mining that facilitates evaluating and constructing high-performance graph mining algorithms. First, GMS comes with a benchmark specification based on extensive literature review, prescribing representative problems, algorithms, and datasets. Second, GMS offers a carefully designed software platform for seamless testing of different fine-grained elements of graph mining algorithms, such as graph representations or algorithm subroutines. The platform includes parallel implementations of more than 40 considered baselines, and it facilitates developing complex and fast mining algorithms. High modularity is possible by harnessing set algebra operations such as set intersection and difference, which enables breaking complex graph mining algorithms into simple building blocks that can be separately experimented with. GMS is supported with a broad concurrency analysis for portability in performance insights, and a novel performance metric to assess the throughput of graph mining algorithms, enabling more insightful evaluation. As use cases, we harness GMS to rapidly redesign and accelerate state-of-the-art baselines of core graph mining problems: degeneracy reordering (by >2X), maximal clique listing (by >9×),k-clique listing (by up to 1.1×), and subgraph isomorphism (by 2.5×), also obtaining better theoretical performance bounds. Maciej Besta, Zur Vonarburg-Shmaria, Yannick Schaffner, Leonardo Schwarz, Grzegorz Kwasniewski, Lukas Gianinazzi, Jakub Beránek, Kacper Janda, Tobias Holenstein, Sebastian Leisinger, Peter Tatkowski, Esref Özdemir, Adrian Balla, Marcin Copik, Philipp Lindenberger, Marek Konieczny, Onur Mutlu, Torsten Hoefler |
Proc. VLDB Endow. | 16 |
| 2021 | High-Performance Routing With Multipathing and Path Diversity in Ethernet and HPC NetworksabstractThe recent line of research into topology design focuses on lowering network diameter. Many low-diameter topologies such as Slim Fly or Jellyfish that substantially reduce cost, power consumption, and latency have been proposed. A key challenge in realizing the benefits of these topologies is routing. On one hand, these networks provide shorter path lengths than established topologies such as Clos or torus, leading to performance improvements. On the other hand, the number of shortest paths between each pair of endpoints is much smaller than in Clos, but there is a large number of non-minimal paths between router pairs. This hampers or even makes it impossible to use established multipath routing schemes such as ECMP. In this article, to facilitate high-performance routing in modern networks, we analyze existing routing protocols and architectures, focusing on how well they exploit the diversity of minimal and non-minimal paths. We first develop a taxonomy of different forms of support for multipathing and overall path diversity. Then, we analyze how existing routing schemes support this diversity. Among others, we consider multipathing with both shortest and non-shortest paths, support for disjoint paths, or enabling adaptivity. To address the ongoing convergence of HPC and “Big Data” domains, we consider routing protocols developed for both HPC systems and for data centers as well as general clusters. Thus, we cover architectures and protocols based on Ethernet, InfiniBand, and other HPC networks such as Myrinet. Our review will foster developing future high-performance multipathing routing protocols in supercomputers and data centers. Maciej Besta, Jens Domke, Marcel Schneider, Marek Konieczny, Salvatore Di Girolamo, Timo Schneider, Ankit Singla, Torsten Hoefler |
IEEE Trans. Parallel Distributed Syst. | 4 |
| 2020 | FatPaths: routing in supercomputers and data centers when shortest paths fall shortabstractWe introduce FatPaths: a simple, generic, and robust routing architecture that enables state-of-the-art low-diameter topologies such as Slim Fly to achieve unprecedented performance. FatPaths targets Ethernet stacks in both HPC supercomputers as well as cloud data centers and clusters. FatPaths exposes and exploits the rich (“fat”) diversity of both minimal and non-minimal paths for high-performance multi-pathing. Moreover, FatPaths uses a redesigned “purified” transport layer that removes virtually all TCP performance issues (e.g., the slow start), and incorporates flowlet switching, a technique used to prevent packet reordering in TCP networks, to enable very simple and effective load balancing. Our design enables recent low-diameter topologies to outperform powerful Clos designs, achieving 15% higher net throughput at 2” lower latency for comparable cost. FatPaths will significantly accelerate Ethernet clusters that form more than 50% of the Top500 list and it may become a standard routing scheme for modern topologies.Extended paper version: https://arxiv.org/abs/1906.10885 Maciej Besta, Marcel Schneider, Marek Konieczny, Karolina Cynk, Erik Henriksson, Salvatore Di Girolamo, Ankit Singla, Torsten Hoefler |
SC | 3 |
| 2016 | Highly customizable framework for performance evaluation of LOOM-based SDN controllersabstractThe article presents an innovative method for assessing performance of modular SDN controllers, focusing on test customization.The method was validated by construction of a testing framework that gives its users the opportunity to emulate various network traffic patterns by using arbitrarily chosen applications, rather than simulating workloads.The presented solution is more comprehensive than others available in contemporary SDN environments also because it that takes into account specific features of modular SDN controllers. Szymon Mentel, Marek Konieczny, Slawomir Zielinski |
FedCSIS | 2 |