Facing soaring enrollment and disruptive educational technologies, computing education increasingly relies on the contributions of teaching assistants (TAs), hence the critical importance of high-quality TA training. However, the design and implementation of TA training in computer science face substantial barriers, such as the lack of experienced TA trainers and the scarcity of relevant training materials.

Work in Progress: This Innovative Practice Work in Progress paper reports the continuous reform of a project-based engineering course in a Chinese university, particularly its impact on student engagement. Projects on Electronic Technology is a project-based course offered during the summer semester for sophomores. Students develop a small electronic system in three consecutive weeks. In recent years, we have tried to reform the teaching and learning of this course in many ways, including changing the main deliverable from fixed-topic projects to open-ended, student-driven projects, and a shift from individual to team-based work. The course instructors had witnessed an increase in student engagement. In order to investigate the main factors that improve students' engagement in project-based learning, student feedback was collected through a post-course questionnaire in the summer of 2022. In the questionnaire, we listed 15 potential factors that might impact student engagement in the course. 77 out of 88 students in the summer 2022 course completed the questionnaire. This paper presents and analyzes the top factors that impacted student engagement in the course according to student feedback.

A novel data-driven simulation-based diagnostic model is proposed to realize automatic and practical testability analysis (TA) of analog circuits. With this model and the corresponding methods, sufficient faults can be handily injected into the circuit under test and then be simulated to construct the sample data. Using these data, a kernel density estimation on K-nearest neighbors classification algorithm and its leave-one-out cross-validation method are studied to evaluate the testability metrics. To handle the possible high false alarm caused by the faults that have similar samples with the fault-free case, two strategies are carried out by ignoring the faults in the ambiguity groups or/and using the posterior weights to determine the final classification results. Furthermore, a sample compression approach is proposed to reduce the computational cost. Experimental results show that more accurate and reasonable TA and verification can be achieved by comparing with the traditional testability models and the state-of-the-art classification methods. And the diagnostic application against a real circuit based on the simulation data can also reach a satisfactory level.

An empirical study is conducted to analyze the fault models of CMOS gates in VLSI. The mutation analysis methodology is used to ensure the simulation experiments are sufficient enough. For the primitive CMOS logic cells: inverter, 2-input NAND, NOR and XOR gates, a total of 335 mutant circuits are generated, simulated and analyzed. Comparing with the previous work, several new fault models are revealed, such as other-logic and the indetermination fault categorys sub-categories: 0-to-X, 1-to-X and other-to-X. Besides, the experimental results show that the classic static stuck-at fault cannot cover many practical defects in a circuit since it just averagely accounts for less than 15% of the total faults. Many other useful conclusions are drawn, which may benefit the related fault-based applications.