The Directed Acyclic Graph (DAG) task model for real-time scheduling finds its primary practical target in Robot Operating System 2 (ROS 2). However, ROS 2's publish/subscribe API leaves DAG precedence constraints unenforced: a callback may publish mid-execution, and multi-input callbacks let developers choose topic-matching policies. Thus preserving DAG semantics relies on conventions; once violated, the model collapses. We propose the Function-as-Subtask (FasS) API, which expresses each subtask as a function whose arguments/return values are the subtask's incoming/outgoing edges. By minimizing description freedom, DAG semantics is guaranteed at the API rather than by programmer discipline. We implement a DAGnative scheduler using FasS on a Rust-based experimental kernel and evaluate its semantic fidelity, and we outline design guidelines for applying FasS to Linux sched_ext.

Every year, embedded systems, such as self-driving systems, are becoming larger and more complex which requires high computing power yet low power consumption. To meet these requirements, there is an increase in the usage of many-core processors. However, thorough understanding of the concept of many-core processors is needed for these to be adopted. Therefore, Software-Hardware Interface for Multi-Many-Core (SHIM), a hardware abstraction description, was developed to reduce the burden on developers. However, SHIM cannot fully demonstrate communication overhead as it describes overhead in instruction units. For this reason, the communication overhead cannot be used to estimate execution time. With this, we propose a new schema that can describe the communication overhead in API units. In other words, the communication API overhead can be described without relying on communication libraries. To improve the usability of the existing schema, which is SHIM, we incorporated the proposed schema into SHIM. We set up what is required of the proposed schema, considered use cases, and actually created instance diagrams to evaluate the proposed schema. We also compared the proposed schema with SHIM and determined what needs to be modified when incorporating the schema. As a result, the proposed schema can express communication overhead that varies with the combination of cores and message size, while significantly reducing the amount of description.

In this paper, block parallel Gibbs sampling (BPGS) multiple-input multiple-output (MIMO) detection is proposed. In a conventional Gibbs sampling scheme, MIMO detection is carried out sequentially symbol-by-symbol. The proposed scheme divides a symbol vector to blocks and updates candidate transmit symbols in parallel in a block so that the total number of iterations in a unit period increases. Furthermore, maximum ratio combining (MRC) is adopted to BPGS to improve accuracy in this paper. Numerical results obtained through computer simulations show that bit error rate performance under high bit-energy-to-noise-spectrum-density conditions improves with the proposed scheme. It is also shown that the block size of three achieves the best performance when number of antennas is 16×16 and the number of iterations is 50.

In this paper, a metric function for Gibbs sampling multiple-input multiple-output (MIMO) detection is proposed. In conventional Gibbs sampling MIMO detection, an exponential function is used in the calculation of a metric for the selection of candidate symbols. However, the exponential function can be implemented by a look-up table and may require a large amount of memory. This paper proposes a metric function based on a simple fraction. The proposed metric substitutes the exponential function though it increases the number of multiplication operations. It is shown by numerical results obtained through computer simulation that the proposed metric function improves the performance under a high signal-to-noise ratio condition in a large scale MIMO system since its curve is close to that of the exponential function when an input metric distance approaches to zero.

This paper describes a method of generating low-distortion sinusoidal waves using an arbitrary waveform generator (AWG), and experimental results of using such a generator for ADC dynamic performance testing. With this proposed method, 3rdorder harmonics of the generated signal are suppressed simply by changing the AWG program (or waveform memory contents)-AWG nonlinearity identification is not required-and spurious components, generated far from the signal band, are relatively easy to remove using an analog filter; our theoretical analyses, simulations, and experiments showed that a simple passive LC analog filter (with relaxed requirements compared to the one for direct HD3 removal) is sufficient. Our ADC testing results-using signals generated by an AWG with the proposed algorithm, and a simple passive LC LPF-show measurement errors (caused by 3rdorder harmonics generated by AWG DAC nonlinearity) half that of previous algorithms.