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Pushkar Nandkar

dblp:155/4944 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2025
0009-0004-5810-2162ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware accelerators and domain-specific architectures · 44% Processor architecture and microarchitecture · 44% Memory systems · 13%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
dataflow architecture
0.912025
Invited: SambaNova SN40L: Unleashing Agentic AI with Dataflow · DAC 2025
Hardware accelerators and domain-specific architectures › machine learning accelerator
inference accelerator
0.912025
Invited: SambaNova SN40L: Unleashing Agentic AI with Dataflow · DAC 2025
YearPublicationVenuePosition
2025 Invited: SambaNova SN40L: Unleashing Agentic AI with Dataflow
abstract
AI inference clouds are increasingly being tasked with running a diverse set of models to support interactive, agentic workloads such as LLM-powered assistants, chatbots, and autonomous agents. Efficient AI cloud inference requires producing tokens during the memory-bound decode phase at peak performance, as well as economically hosting and rapidly switching between a vast array of models. We describe the SambaNova SN40L Reconfigurable Dataflow Unit (RDU) that combines dataflow with a three-tier memory system with SRAM, HBM, and DDR. Dataflow enables peak token generation performance with aggressive fusion of large compute graphs into a single kernel. HBM and high-capacity DDR drastically lower hardware footprint to host and serve trillions of parameters at scale. The SN40L RDU produce tokens over $\mathbf{3} \times$ faster, consume $3 \times$ less energy, and lower model hosting costs by up to $19 \times$ over a DGX H100.
Raghu Prabhakar, Pushkar Nandkar, Darshan Gandhi, Nasim Farahini, Håkan Zeffer
DAC2