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Yussuf Ali

dblp:156/1431 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 2020
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
High-performance computing · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
High-performance computing › large-scale simulation
fusion plasma simulation
0.412020
Acceleration of fusion plasma turbulence simulations using the mixed-precision communication-avoiding krylov method · SC 2020
High-performance computing
gyrokinetic simulation
0.412020
Acceleration of fusion plasma turbulence simulations using the mixed-precision communication-avoiding krylov method · SC 2020
High-performance computing
scientific computing
0.412020
Acceleration of fusion plasma turbulence simulations using the mixed-precision communication-avoiding krylov method · SC 2020
High-performance computing › iterative methods
krylov subspace method
0.112020
Acceleration of fusion plasma turbulence simulations using the mixed-precision communication-avoiding krylov method · SC 2020

Methods — techniques the papers use, named apart from their topics

mixed precision · 0.4FP16 preconditioner · 0.4
YearPublicationVenuePosition
2020 Acceleration of fusion plasma turbulence simulations using the mixed-precision communication-avoiding krylov method
abstract
The multi-scale full-f simulation of the next generation experimental fusion reactor ITER based on a five dimensional (5D) gyrokinetic model is one of the most computationally demanding problems in fusion science. In this work, a Gyrokinetic Toroidal 5D Eulerian code (GT5D) is accelerated by a new mixed-precision communication-avoiding (CA) Krylov method. The bottleneck of global collective communication on accelerated computing platforms is resolved using a CA Krylov method. In addition, a new FP16 preconditioner, which is designed using the new support for FP16 SIMD operations on A64FX, reduces both the number of iterations (halo data communication) and the computational cost. The performance of the proposed method for ITER size simulations with ~0.1 trillion grids on 1,440 CPUs/GPUs on Fugaku and Summit shows 2.8× and 1.9× speedups respectively from the conventional non-CA Krylov method, and excellent strong scaling is obtained up to 5,760 CPUs/GPUs.
Yasuhiro Idomura, Takuya Ina, Yussuf Ali, Toshiyuki Imamura
SC3
2014 Parallel Path Delay Fault Simulation for Multi/Many-Core Processors with SIMD Units
abstract
Multi/many-core processors allow to handle path delay faults although the number of paths exponentially grows with the circuit size. This paper proposes an efficient path delay fault simulation that identifies all the robust and non-robust testable path delay faults for each test pattern. The simulation result is expressed by a scalable data structure only proportional to the numbers of gates and test patterns. The proposed simulation uses two types of parallelism, bit- and thread-parallelism, while considering efficient usage of multiple computing units and SIMD units which is resulting in a very fast simulation. Experimental results demonstrate the efficiency of the proposed method identifying all the robust and non-robust testable paths for a large number of test patterns. In addition, the simulation surpasses a commercial logic simulator which just processes a part of the proposed method.
Yussuf Ali, Yuta Yamato, Tomokazu Yoneda, Kazumi Hatayama, Michiko Inoue
ATS1