Real-time anomaly detection at the Large Hadron Collider (LHC) requires ultra-low-latency inference under strict computational constraints. This paper presents the FPGA implementation of Spiking Neural Network AutoEncoders (SNN-AEs) for anomaly detection at the trigger level. Multiple SNN-AE architectures are synthesized on Xilinx UltraScale+ FPGAs and their resource utilization is characterized. Event-based spike processing reduces DSP usage by 67% and LUT usage by 53% compared to conventional Deep NN implementations while maintaining Area Under Curve (AUC) = 0.899 for charged Higgs-like scalar (h+) detection. The smallest SNN-AE architecture consumes only 1.99% LUTs and 1.94% DSPs, enabling viable integration into existing L1 trigger systems. Using the Compact Muon Solenoid (CMS) ADC2021 dataset, hardware resource comparisons are provided with FPGA-deployed DNN AutoEncoders across multiple signal models and architectural configurations.

Despite rapid advances in medical technology, cardiac diseases remain the leading cause of global mortality, with arrhythmias that pose significant diagnostic and treatment challenges. This survey presents a comprehensive review of 176 state-of-the-art contributions in machine learning (ML), federated learning (FL), TinyML, and hardware acceleration for efficient, real-time, and privacy-preserving cardiac diagnosis and care. Explores both software and hardware advancements, including differential privacy (DP), quantized neural networks, and FPGA (Field Programmable Gate Array)-based implementations optimized for edge devices and wearable devices. Key challenges, such as latency, energy constraints, adversarial robustness, and personalization, are systematically examined. The survey synthesizes solutions across algorithmic innovations, secure and adaptive FL frameworks, and neuromorphic and sparse architectures, especially FPGA-based solutions, for resource-aware inference and training. Informed by original research, it highlights emerging directions: AI-driven data mining, DP for quantized models, continual learning (CL) on the edge, FPGA-accelerators including quantized DNN, SNN, and Sparse architectures, tuneable/reconfigurable FPGA-based TinyDPFL, Multimodal heterogeneous FL, real-time adversarial detection via model watermarking. This work offers a unified system-level perspective bridging ML algorithms and edge AI hardware, guiding the development of scalable, adaptive, and trustworthy cardiac healthcare systems. Beyond surveying existing literature, it proposes forward-looking design principles to advance intelligent, secure, and practical digital cardiology.

This paper presents a sensory fusion neuromorphic dataset collected with precise temporal synchronization using a set of Address-Event-Representation sensors and tools. The target application is the lip reading of several keywords for different machine learning applications, such as digits, robotic commands, and auxiliary rich phonetic short words. The dataset is enlarged with a spiking version of an audio-visual lip reading dataset collected with frame-based cameras. LIPSFUS is publicly available and it has been validated with a deep learning architecture for audio and visual classification. It is intended for sensory fusion architectures based on both artificial and spiking neural network algorithms.

Networks-on-Chip (NoC) is the most modular and scalable solution for next generation hardware communication where significant data traffic loads are shared across many communication paths. One key challenge in maximising NoC performance is traffic congestion. The management of congestion at the earliest stage can significantly minimize the impact on NoC throughput. Prediction of NoC congestion offers a pre-emptive strategy in maximising NoC throughput. This paper proposes a novel spiking neural network (SNN) approach to prediction of traffic congestion. The proposed SNN exploits the temporal nature of the traffic to identify congestion patterns. The proposed SNN explores two models and both are trained and evaluated to predict local congestion 30 clock cycles in advance of occurring. Results shows that the SNN predictor utilizes 9 times less hardware area than previous approaches and can achieved up to 96.59% in accuracy.