Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Marco Grossi

dblp:157/0493 · DBLP profile ↗
← Back
4ranked-venue papers
4as first author
2since 2021 · last 2022
0000-0003-1316-9035ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 3 first-author · 2 since 2021Software engineering, systems software and programming languages · 1 · 1 first-author · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Storage systems · 91% Integrated circuit design · 9%

Topics — the 3 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Storage systems › flash and SSD
flash memory
0.012003
Program schemes for multilevel flash memories · Proc. IEEE 2003
Storage systems › flash and SSD › flash memory
multi-level cell flash
0.012003
Program schemes for multilevel flash memories · Proc. IEEE 2003
Storage systems › flash and SSD › flash memory
threshold voltage distribution
0.012003
Program schemes for multilevel flash memories · Proc. IEEE 2003

Methods — techniques the papers use, named apart from their topics

fowler-nordheim tunneling · 0.0channel hot electrons · 0.0
YearPublicationVenuePosition
2022 Novel BTI Robust Ring-Oscillator-Based Physically Unclonable Function
abstract
Physically Unclonable Functions (PUFs) have become a promising low-cost solution for authentication and key generation in cryptosystems. However, it has been shown in the literature that the reliability of PUFs is undermined by aging mechanisms, such as Bias Temperature Instability (BTI), which may compromise their correct operation. In this paper, we present a novel ring oscillator (RO) based PUF design that is robust against BTI degradation, hereinafter referred to as Low-sensitive-BTI RO - LBTIRO. We compare our proposed LBTIRO to the standard RO-based PUF and to an alternative NBTI-robust RO-PUF recently presented in the literature, for 90 nm and 32 nm CMOS technology nodes. We show that, for considered technology nodes, our proposed LBTIRO features a higher robustness against BTI. Particularly, our LBTIRO enables a reduction of the impact of BTI on the oscillation frequency over circuit lifetime, which reaches 85.3% and 72.1% against the standard RO and the recent alternate solution, respectively, for the 90 nm technology. Moreover, we show that our proposed LBTIRO features a reduction in terms of power consumption if compared to the alternative NBTIrobust RO-PUF.
Marco Grossi, Martin Omaña 0001, Daniele Rossi 0001, Biagio Marzulli, Cecilia Metra
IOLTS1
2021 Investigation of the Impact of BTI Aging Phenomenon on Analog Amplifiers
Marco Grossi, Martin Omaña 0001
J. Electron. Test.1
2019 Impact of Bias Temperature Instability (BTI) Aging Phenomenon on Clock Deskew Buffers
Marco Grossi, Martin Omaña 0001
J. Electron. Test.1
2003 Program schemes for multilevel flash memories
abstract
This paper presents a synthetic overview of multilevel (ML) flash memory program methods. The problem of increasing program time with the number of bits stored in each cell is discussed and methods based on both channel hot electrons (CHE) and Fowler-Nordheim tunneling (FNT) are discussed. In the case of CHE, the use of an increasing voltage rather than a constant one on the control gate (CG) leads to narrower threshold voltage distributions and smaller current absorption, with positive effects on the degree of parallelism and program throughput. As for FNT, much faster programming than that commonly used today can be done using high CG voltages without producing intolerable degradation of cell reliability.
Marco Grossi, Massimo Lanzoni, Bruno Riccò
Proc. IEEE1