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Ji Yun Kim

dblp:157/2788 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 2014
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
GPUs and heterogeneous computing · 44% Hardware accelerators and domain-specific architectures · 44% Parallel and multicore computing · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
GPUs and heterogeneous computing
GPU computing
0.212014
Accelerating Irregular Algorithms on GPGPUs Using Fine-Grain Hardware Worklists · MICRO 2014
Hardware accelerators and domain-specific architectures
irregular application acceleration
0.212014
Accelerating Irregular Algorithms on GPGPUs Using Fine-Grain Hardware Worklists · MICRO 2014
Parallel and multicore computing
load balancing
0.112014
Accelerating Irregular Algorithms on GPGPUs Using Fine-Grain Hardware Worklists · MICRO 2014

Methods — techniques the papers use, named apart from their topics

work spilling · 0.2work redistribution · 0.2cycle-level simulation · 0.2
YearPublicationVenuePosition
2014 Accelerating Irregular Algorithms on GPGPUs Using Fine-Grain Hardware Worklists
abstract
Although GPGPUs are traditionally used to accelerate workloads with regular control and memory-access structure, recent work has shown that GPGPUs can also achieve significant speedups on more irregular algorithms. Data-driven implementations of irregular algorithms are algorithmically more efficient than topology-driven implementations, but issues with memory contention and memory-access irregularity can make the former perform worse in certain cases. In this paper, we propose a novel fine-grain hardware work list for GPGPUs that addresses the weaknesses of data-driven implementations. We detail multiple work redistribution schemes of varying complexity that can be employed to improve load balancing. Furthermore, a virtualization mechanism supports seamless work spilling to memory. A convenient shared work list software API is provided to simplify using our proposed mechanisms when implementing irregular algorithms. We evaluate challenging irregular algorithms from the Lonestar GPU benchmark suite on a cycle-level simulator. Our findings show that data-driven implementations running on a GPGPU using the hardware work list outperform highly optimized software-based implementations of these benchmarks running on a baseline GPGPU with speedups ranging from 1.2 -- 2.4× and marginal area overhead.
Ji Yun Kim, Christopher Batten
MICRO1