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Mahesh Patil

dblp:159/2386 · DBLP profile ↗
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3ranked-venue papers
1as first author
1since 2021 · last 2025
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Security and privacy · 1 · 1 first-author · 1 since 2021Databases, data management, data science and information retrieval · 1Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Storage systems · 81% Cloud and datacenter computing · 19%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Cloud and datacenter computing
virtualization
0.112015
A Practical Implementation of Clustered Fault Tolerant Write Acceleration in a Virtualized Environment · FAST 2015
Storage systems
virtual storage
0.112015
A Practical Implementation of Clustered Fault Tolerant Write Acceleration in a Virtualized Environment · FAST 2015
YearPublicationVenuePosition
2025 A blended approach of static binary mining and exploratory data analysis to obtain the security posture of embedded systems firmware
abstract
In the era of connected embedded systems, devices are often targeted by sophisticated cyber-attacks. The entry point for these attacks is more often through firmware and hence analysing its security is vital. This research presents an innovative method for evaluating the security posture of firmware by examining its binary constituents. The approach combines static binary mining techniques with exploratory data analysis to visually depict the security posture of firmware. This aids in providing a comprehensive perspective of its weaknesses and strengths. To validate the effectiveness of the proposed approach and methodology, an in-depth security analysis is carried out on five real world firmware samples. The selection of these firmware samples encompasses a wide range of devices and applications, thereby assuring the broad relevance of the findings. The results demonstrate the efficacy of this technique in revealing and visually representing different firmware security characteristics, such as the firmware attack surface, the effectiveness of binary protection mechanisms, and the overall security resilience. The methodology is implemented as an open source tool named fw2ai, which automates the security analysis serving the needs of both security researchers and practitioners.
Mahesh Patil, Shailaja C. Patil
Int. J. Inf. Comput. Secur.1
2016 Exploring effects of immersivity across three dimensions in Training Design: Technology Integration Training Workshop for Engineering Teachers in India
abstract
Short term training programs are relevant in Indian context as an effective teacher professional development program as it addresses the ever present problem of paucity of time among engineering faculty members and the need to keep abreast with latest technological offerings. Most of the training programs studied so far, deal with techniques to incorporate Technology, Content and Pedagogy in classroom teaching. However, they do not adequately represent the techniques required when technology and content are inter-related as seen in circuit simulations for instance. We propose training with immersivity in Technology, Content and Pedagogy as an effective format for TDP when the technology aspect is closely connected to the content. We specifically look into the integration of SEQUEL - a circuit simulation and analysis tool, in the context of teaching analog electronic circuit design. In this paper, we present findings from an implementation of short term training program, merging recommendations from TPACK framework and immersivity in the three dimensions of Technology, Content and Pedagogy, as the underlying design principle. Our study shows promising results and indicates a clear shift towards adopting technology and pedagogy principles to augment content in lesson plans by the participating faculty members.
Madhuri Mavinkurve, Soumya Narayanan, Mahesh Patil
ICCE3
2015 A Practical Implementation of Clustered Fault Tolerant Write Acceleration in a Virtualized Environment
Deepavali Bhagwat, Mahesh Patil, Michal Ostrowski, Murali Vilayannur, Woon Jung, Chethan Kumar
FAST2