This paper presents a new dual-inductor hybrid boost converter (DI-HBOC) with two inductors located at the output. This structure allows continuous current delivered to the load, thus, reducing the output filtering capacitor size and the output voltage ripple. By relocating the inductor at the output, which is the lower current path, the conduction loss on the inductor can be significantly reduced. The right half plane zero (RHPZ) in the control-to-output transfer function can also be eliminated; therefore, a simple pulse-width modulation (PWM) voltage-mode controller can be used for the proposed DI-HBOC while still achieving high closed-loop bandwidth and fast transient response. The distinct features of the proposed converter are analytically demonstrated. A 12-to 24 V DI-HBOC and a conventional BOC (CBOC) using low-ÆoN GaN switches with PWM voltage-mode controller are also implemented in PSIM for verification and comparison. The simulated peak power efficiency is 97.4 % that is 1.17 % higher than the CBOC. At 3 A load current, the power efficiency is improved by 9.7 % and the output ripple is only 17.5 mV, 6x lower than in CBOC.

This paper presents a novel and compact bandgap comparator (BGRCOMP) for under-voltage lockout (UVLO) and thermal shutdown (TSD) protection circuits. The proposed BGRCOMP is self-referenced and combines the advantages of both a high-accuracy bandgap reference and a comparator into one single circuit. A latch-controlled biasing technique is also presented, which reduces static power consumption of the proposed BGRCOMP. The proposed BGRCOMP is used for the design of compact and low power UVLO and TSD circuits. The post-layout simulation results using a 0.18 μm BCD-on-SOI technology prove the attractive performance of the UVLO and TSD with a static current (Iq) of 7.76 μA and 5.4 μA from a 5 V supply, respectively. The deviations of UVLO thresholds are less than 3 mV in the temperature range of -40~85 °C.

This paper presents a compact configurable power control system for safety-critical applications, which operates in harsh environments. This heterogeneous integrated mixed digital, analog and high-voltage design for power applications is implemented in a system-in-package (SiP) module using a low-temperature co-fired ceramics (LTCC) substrate. A comparison between technologies for SiP designs shows that LTCC is advantageous in terms of integration density, thermal and electrical performances, as well as signal and power integrity. In addition, this work proposes layout and fabrication techniques for the enhancement of thermal, electrical performances and integration density specific to LTCC-based designs, such as chip-covering, multi-layer routing of power signals and self-damped transmission lines. An improvement of 59% in available area, 32% reduction of temperature due to self-heating, 65% loss reduction and 22% reduction in interference coupling were obtained when compared to a baseline design.

An eight-stage reconfigurable charge pump for microelectromechanical system (MEMS) electrostatic actuation was designed and fabricated in a standard 0.13-μm CMOS technology. The purpose of the circuit is to generate sufficient on-chip voltages that are continually reconfigurable for MEMS actuation. Small 1-pF pumping capacitors are used to reduce the circuit area. Digitally programmable voltage levels can be out putted by varying the number of stages and the clock drive levels dynamically. Reduced power consumption is achieved using a variable frequency clock. The circuit attains a measured maximum output voltage of 10.1 V from a 1.2 V supply. Its nominal clock is set to 50 MHz. The circuit has a compact area of 215 μm × 300 μm and consumes 864 μW at a 50-MHz clock and 252 μW at an 8-MHz clock.

A 31 stages high voltage reconfigurable charge pump is presented for electrostatic actuation of an optical laterally rotating MEMS mirror. A maximum output voltage of 360.5 V with a rise time of 16.7 ms for a clock frequency of 62.5 kHz is demonstrated through simulations. A variable amplitude clock generator is implemented within the same circuit to control the voltage levels of the charge pump. The maximal output ripple is 1.1 V for a 10 pF load, representing a small relative deviation of 0.31% suitable for MEMS electrostatic actuation. The average step between two consecutive output voltages is 4.9 V between 50 V and 340 V. This small increment enables the fine tuning of the MEMS rotation angle. The circuit is designed in a 0.8 μm high voltage CMOS technology and has an area of 675 μm × 1100 μm.