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Edward W. Scheckler

dblp:16/1382 · DBLP profile ↗
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4ranked-venue papers
3as first author
0since 2021 · last 1994
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 3 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
4 papers
Electronic design automation · 89% Performance modeling and evaluation · 11%

Topics — the 5 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › technology computer-aided design
process simulation
0.041994
Algorithms for simulation of three-dimensional etching · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994
Models and algorithms for three-dimensional topography simulation with SAMPLE-3D · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994
An efficient volume-removal algorithm for practical three-dimensional lithography simulation with experimental verification · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Electronic design automation › technology computer-aided design › process simulation
lithography simulation
0.021994
Algorithms for simulation of three-dimensional etching · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994
An efficient volume-removal algorithm for practical three-dimensional lithography simulation with experimental verification · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1993
Performance modeling and evaluation › simulation › simulation software
simulation framework
0.011992
A utility-based integrated system for process simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992
Electronic design automation
CAD framework
0.011992
A utility-based integrated system for process simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992
Electronic design automation
technology computer-aided design
0.011992
A utility-based integrated system for process simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992

Methods — techniques the papers use, named apart from their topics

visibility computation · 0.0surface advancement · 0.0recursive ray method · 0.0ray-string algorithm · 0.0facet motion · 0.0convolution · 0.0fixed time step dissolution · 0.0dynamic memory allocation · 0.0functional utilities · 0.0cross-section format mapping · 0.0
YearPublicationVenuePosition
1994 Models and algorithms for three-dimensional topography simulation with SAMPLE-3D
abstract
Algorithms for general surface advancement, three-dimensional visibility, and convolution over a surface have been developed and coupled with physical models for pattern transfer. The resulting program, SAMPLE-3D, allows practical simulation of plasma etching and deposition processes on engineering workstations. The physical models are 3-D extensions of 2-D string and segment based models. The models include secondary effects, such as material density variations and damage enhanced etching. A general facet motion algorithm supports simple, isotropic, cosine-directional, and general surface orientation dependent processes. A 3-D grid of rectangular prismatic cells, which is updated by the advancing surface, contains an alternate topography representation for fast shadow and visibility calculation. The program is organized as a collection of modular functions for continued model and algorithm development. Guidelines for estimating CPU and memory requirements for various models and simulation cases are based on an analysis of the algorithms and data structures. Simple processes, such as lithography development, require 1-5 min of CPU time. Simulations involving integration over flux distributions, such as plasma etching and sputter deposition, require from 5-30 min for typical cases. Reflection or surface migration calculations require from 30-60 min. Physical memory of 4-32 megabytes is sufficient for many practical simulations.>
Edward W. Scheckler, Andrew R. Neureuther
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1994 Algorithms for simulation of three-dimensional etching
abstract
A three-dimensional optical lithography simulator has been developed based on a new ray-string algorithm for dissolution etch-front advancement. In developing the new algorithm, performance studies of cell, string and ray algorithms were carried out in two dimensions. A key finding was that a recursive ray method for the calculation of the surface-advancement vector produced numerically stable and highly accurate results. The optimum algorithm was found to be one that combines the recursive-ray method with the string approach, in which etch-rate-dependent rays are used to advance the points, segments and triangles which make up the etching boundary. This algorithm has been implemented in 3-D in the C programming language, using a linked-list data structure to represent the etching boundary mesh. Recursive time-step selection, mesh modification, and clipping and delooping of the etch boundary surface have been implemented. The 3-D ray-string etch simulator has been coupled to 2-D imaging and 3-D resist-exposure simulators to form SAMPLE-3D, a complete fast and accurate 3-D photolithography simulator. The complete simulator has been used to investigate various issues in 3-D lithographic pattern transfer.>
Kenny K. H. Toh, Andrew R. Neureuther, Edward W. Scheckler
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
1993 An efficient volume-removal algorithm for practical three-dimensional lithography simulation with experimental verification
abstract
A fast three-dimensional volume removal algorithm for resist dissolution is presented and verified with applications to optical lithography with phase-shift masks, resist silylation, and electron-beam lithography. Memory requirements are reduced by dynamically allocating complete topography and material information only at surface cells, and setting other cells as either bulk material or developer. The dissolution algorithm uses a fixed time step and stores the volume of material remaining in the surface cells. A simple redistribution scheme is used if more volume would be removed from a cell in one time step that is currently present. The compactness and speed of the algorithm make it suitable for use on engineering workstations. Simulations requiring 100*100*100 cells can be performed in a few minutes. Theoretical defocus effects in phase-shift mask lithography and shot-size error in electron-beam lithography are compared with experiment. A dry-etch resist silylation process is also investigated.>
Edward W. Scheckler, Nelson N. Tam, Anton K. Pfau, Andrew R. Neureuther
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1992 A utility-based integrated system for process simulation
abstract
An integrated process simulation system which uses functional utilities to integrate disparate 2-D simulation tools is described. The software utilities provide mechanisms for simulator input generation and user interaction, for mapping between different cross-section formats, and for output visualization. The specific utilities are described. With this approach, several process simulators for lithography, etching, deposition, and thermal processing have been integrated into a unified system, SIMPL-IPX (simulation of profiles from the layout-integrated process simulation environment with X-Windows). Simulation examples for metal l planarization, bipolar technology with a polysilicon , collector 5 plug, and advanced lithography are presented to demonstrated 7 the usefulness of this approach to technology CAD tool 8 integration. Methods for improved data management using 9 a CAD framework are described.>
Edward W. Scheckler, Alexander S. Wong, Robert K. Wang, Goodwin R. Chin, John R. Camagna, Andrew R. Neureuther, Robert W. Dutton
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1