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Mitsuhiro Kishimoto

dblp:16/4164 · DBLP profile ↗
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3ranked-venue papers
0as first author
0since 2021 · last 2000
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Distributed systems · 53% Interconnection networks and networks-on-chip · 26% Processor architecture and microarchitecture · 9%
Software engineering, system software, and programming languages
1 paper
Runtime systems and virtual machines · 100%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Interconnection networks and networks-on-chip
cluster interconnect
0.011999
CrispORB: High Performance CORBA for System Area Network · HPDC 1999
Distributed systems › middleware › distributed object middleware
CORBA
0.011999
CrispORB: High Performance CORBA for System Area Network · HPDC 1999
Distributed systems
distributed object systems
0.011999
CrispORB: High Performance CORBA for System Area Network · HPDC 1999
High-performance computing
cluster computing
0.011999
CrispORB: High Performance CORBA for System Area Network · HPDC 1999
Processor architecture and microarchitecture
instruction set architecture
0.011986
Evaluation of the FACOM ALPHA Lisp Machine · ISCA 1986
Processor architecture and microarchitecture › special-purpose processor
LISP machine
0.011986
Evaluation of the FACOM ALPHA Lisp Machine · ISCA 1986
Performance modeling and evaluation
workload characterization
0.011986
Evaluation of the FACOM ALPHA Lisp Machine · ISCA 1986
Runtime systems and virtual machines
garbage collection
0.011986
Evaluation of the FACOM ALPHA Lisp Machine · ISCA 1986

Methods — techniques the papers use, named apart from their topics

performance evaluation · 0.0
YearPublicationVenuePosition
2000 Accelerated Socket Communications in System Area Networks
Masanori Itoh, Tooru Ishizaki, Mitsuhiro Kishimoto
CLUSTER3
1999 CrispORB: High Performance CORBA for System Area Network
abstract
CrispORB is a high performance CORBA that enables low-latency request delivery among cluster nodes connected with the system area network (SAN) and provides a communication infrastructure for large-scale and high-volume cluster system construction with distributed object-oriented components. Compared with standard IIOP ORBs, CrispORB is be able to reduce the protocol overhead using a system area network with intelligent functions for efficient data transfer. CrispORB preserves language mapping specified by COBRA/OMG standards so that component programs written for conventional CORBA could be used without rewriting. CrispORB can manage both SAN and TCP/IP simultaneously, which means the cluster node can communicate with clients via the Internet and with other nodes on the cluster using SAN. Components need not be aware of lower connections because CrispORB selects the transport between SAN and TCP/IP automatically. We selected the VI Architecture to use SAN's communication functions, which are proposed as an industrial standard API for SAN. CrispORB will be portable onto various types of SANs. We have integrated VIA buffer management and CDR (Common Data Representation) format processing to reduce data movement cost. CrispORB was developed based on INTERSTAGE/ObjectDirector (Fujitsu'S CORBA product) and Synfinity-O (Fujitsu's SAN).
Yuji Imai, Toshiaki Saeki, Tooru Ishizaki, Mitsuhiro Kishimoto
HPDC4
1986 Evaluation of the FACOM ALPHA Lisp Machine
abstract
The FACOM ALPHA is the first and only commercially dedicated processor for Lisp and Prolog manufactured in Japan. This paper discusses the evaluation of the FACOM ALPHA for Lisp execution when compared with a general-purpose computer. The CPU use rate of machine instructions and the utilization ratio of the hardware resources are discussed. This paper also explains the interaction between the garbage collector and the virtual memory system, which improves system response time.
Masanobu Yuhara, Akira Hattori, Masashi Niwa, Mitsuhiro Kishimoto, Hiromu Hayashi
ISCA4