Conventional neural speech watermarking often embeds watermarks across all acoustic frames, which can unnecessarily perturb low-energy regions and degrade perceptual quality. To address this issue, we propose a reinforced temporally sparse gating framework that adaptively selects a small subset of frames for watermark insertion, while leaving the remaining frames unchanged to better preserve speech naturalness. A lightweight gating module predicts frame-level masks, and a sparsity-promoting loss encourages temporal dispersion to improve robustness against localized signal dropouts. To further enhance perceptual fidelity beyond reconstruction-based training, we introduce Speech Fidelity Group Relative Policy Optimization as a post-training refinement strategy that leverages non-differentiable PESQ scores as optimization signals. By directly aligning the embedding policy with perceptual quality, the proposed method substantially improves perceptual transparency while maintaining near-perfect robustness under common distortions, significantly outperforming global frame-wise embedding baselines.

A 24-bit sensor Read-out Integrated Circuit (ROIC) with a ±5V input range is presented in this paper. The system utilizes a two-opamp programmable gain amplifier (PGA) and a third-order incremental switched-capacitor sigma-delta (SC Σ∆) analog-to-digital converter (ADC) to achieve a front-end gain ranging from 1 to 128. The PGA comprises a gain-boosting amplification stage and a class-AB output stage, effectively eliminating offset and 1/f noise through chopping. The ADC adapts a configurable zero optimization loop, allowing enhanced noise transfer function (NTF) at different output data rates (ODRs). Double-sampling technique is used to further improve the Signalto-Noise Ratio (SNR). This system is realized in 0.18µm standard CMOS process, providing three power modes and supporting up to four input signal channels. It exhibits a temperature coefficient of less than 2 ppm/°C over the operating range of -40 °C to 105 °C, while achieving a maximum Effective Resolution (ER) of 23.8 bits at a ODR of 10 samples per second (SPS). The calculated Figure of Merit (FoM) for the proposed ROIC reaches 173.7 dB.

This paper presents a high area and power efficiency incremental hybrid Continuous-Time/Discrete-Time Sigma-Delta Modulator (CT/DT SDM) based Current-to-Digital Converter (CDC). The system utilizes a resistor-free continuous-time integrator as the first stage and a Switched-Capacitor (SC) integrator as the second stage to achieve second order noise shaping, leading to significant reduction in the overall area and power consumption when current signal is served as sensor output. The integration of a recycling folded-cascode (RFC) op-amp further contributes to power reduction, while the enhanced charge injection cancellation switch further improve the harmonic and noise characteristics of the system. The proposed CDC achieves 102.5dB Signal-to-Noise and Distortion Ratio (SNDR) with total current consumption of only 54.8µA and an area of 0.08 mm2. The calculated Figure of Merit (FoM) for the system is 172.5dB, indicating an outstanding trade-off between system resolution and power consumption.

Bus passenger flow prediction is a critical component of advanced transportation information system for public traffic management, control, and dispatch. With the development of artificial intelligence, many previous studies attempted to apply machine learning models to extract comprehensive correlations from transit networks to improve passenger flow prediction accuracy, given that the variety and volume of traffic data have been easily obtained. The passenger flow on a station is highly affected by various factors such as the previous time step, peak hours or nonpeak hours, and extracting the key features from the data is essential for a passenger flow prediction model. Although the neural networks, k‐nearest neighbor, and some deep learning models have been adopted to mine the temporal correlations of the passenger flow data, the lack of interpretability of the influenced variables is still a big problem. Classical tree‐based models can mine the correlations between variables and rank the importance of each variable. In this study, we presented a method to extract passenger flow of different routes on the station and implemented a XGBoost model to find the contributions of variables to the prediction of passenger flow. Comparing to benchmark models, the proposed model can reach state‐of‐the‐art prediction accuracy and computational efficiency on the real‐world dataset. Moreover, the XGBoost model can interpret the predicted results. It can be seen that period is the most important variable for the passenger flow prediction, and so the management of buses during peak hours should be improved.

The conventional speaker recognition frameworks (e.g., the i-vector and CNN-based approach) have been successfully applied to various tasks when the channel of the enrolment dataset is similar to that of the test dataset. However, in real-world applications, mismatch always exists between these two datasets, which may severely deteriorate the recognition performance. Previously, a few channel compensation algorithms have been proposed, such as Linear Discriminant Analysis (LDA) and Probabilistic LDA. However, these methods always require the collections of different channels from a specific speaker, which is unrealistic to be satisfied in real scenarios. Inspired by domain adaptation, we propose a novel deep-learning based speaker recognition framework to learn the channel-invariant and speaker-discriminative speech representations via channel adversarial training. Specifically, we first employ a gradient reversal layer to remove variations across different channels. Then, the compressed information is projected into the same subspace by adversarial training. Experiments on test datasets with 54,133 speakers demonstrate that the proposed method is not only effective at alleviating the channel mismatch problem, but also outperforms state-of-the-art speaker recognition methods. Compared with the i-vector-based method and the CNN-based method, our proposed method achieves significant relative improvement of 44.7% and 22.6% respectively in terms of the Top1 recall.

With the prevailing development of Cyber-physical-social systems and Internet of Things, large-scale data have been collected consistently. Mining large data effectively and efficiently becomes increasingly important to promote the development and improve the service quality of these applications. Clustering, a popular data mining technique, aims to identify underlying patterns hidden in the data. Most clustering methods assume the static data, thus they are unfavorable for analyzing large, unbalanced dynamic data. In this paper, to address this concern, we focus on incremental clustering by extending the novel [clustering by fast search (CFS) and find of density peaks] method to incrementally handle large-scale dynamic data. Specifically, we first discuss two challenges, i.e., assignment of new arriving objects and dynamic adjustment of clusters, in incremental CFS (ICFS) clustering. We then propose two ICFS clustering algorithms, ICFS with multiple representatives (ICFSMR) and the enhanced ICFSMR (E_ICFSMR) to tackle the two challenges. In ICFSMR, we explore the convex hull theory to modify the representatives identified for each cluster. E_ICFSMR improves the generality and effectiveness of ICFSMR by exploring one-time cluster adjustment strategy after integration of each data chunk. We evaluate the proposed methods with extensive experiments on four benchmark data sets, as well as the air quality and traffic monitoring time series, with comparisons to CFS and other three state-of-the-art incremental clustering methods. Experimental results demonstrate that the proposed methods outperform the compared methods in terms of both effectiveness and efficiency.

Analyzing loops is very important for various software engineering tasks such as bug detection, test case generation and program optimization. However, loops are very challenging structures for program analysis, especially when (nested) loops contain multiple paths that have complex interleaving relationships. In this paper, we propose the path dependency automaton (PDA) to capture the dependencies among the multiple paths in a loop. Based on the PDA, we first propose a loop classification to understand the complexity of loop summarization. Then, we propose a loop analysis framework, named Proteus, which takes a loop program and a set of variables of interest as inputs and summarizes path-sensitive loop effects (i.e., disjunctive loop summary) on the variables of interest. An algorithm is proposed to traverse the PDA to summarize the effect for all possible executions in the loop. We have evaluated Proteus using loops from five open-source projects and two well-known benchmarks and applying the disjunctive loop summary to three applications: loop bound analysis, program verification and test case generation. The evaluation results have demonstrated that Proteus can compute a more precise bound than the existing loop bound analysis techniques; Proteus can significantly outperform the state-of-the-art tools for loop program verification; and Proteus can help generate test cases for deep loops within one second, while symbolic execution tools KLEE and Pex either need much more time or fail.

There has been a growing interest in food image recognition for a wide range of applications. Among existing methods, mid‐level image part‐based approaches show promising performances due to their suitability for modelling deformable food parts (FPs). However, the achievable accuracy is limited by the FP representations based on low‐level features. Benefiting from the capacity to learn powerful features with labelled data, deep learning approaches achieved state‐of‐the‐art performances in several food image recognition problems. Both mid‐level‐based approaches and deep convolutional neural networks (DCNNs) approaches clearly have their respective advantages, but perhaps most importantly these two approaches can be considered complementary. As such, the authors propose a novel framework to better utilise DCNN features for food images by jointly exploring the advantages of both the mid‐level‐based approaches and the DCNN approaches. Furthermore, they tackle the challenge of training a DCNN model with the unlabelled mid‐level parts data. They accomplish this by designing a clustering‐based FP label mining scheme to generate part‐level labels from unlabelled data. They test on three benchmark food image datasets, and the numerical results demonstrate that the proposed approach achieves competitive performance when compared with existing food image recognition approaches.

Loop termination is an important problem for proving the correctness of a system and ensuring that the system always reacts. Existing loop termination analysis techniques mainly depend on the synthesis of ranking functions, which is often expensive. In this paper, we present a novel approach, named Loopster, which performs an efficient static analysis to decide the termination for loops based on path termination analysis and path dependency reasoning. Loopster adopts a divide-and-conquer approach: (1) we extract individual paths from a target multi-path loop and analyze the termination of each path, (2) analyze the dependencies between each two paths, and then (3) determine the overall termination of the target loop based on the relations among paths. We evaluate Loopster by applying it on the loop termination competition benchmark and three real-world projects. The results show that Loopster is effective in a majority of loops with better accuracy and 20 ×+ performance improvement compared to the state-of-the-art tools.

In this letter, we aim to jointly separate the underdetermined mixtures of latent sources from two datasets, where the number of sources exceeds the number of observations in each dataset. Currently available blind source separation (BSS) methods, including joint blind source separation (JBSS) and underdetermined blind source separation (UBSS), cannot address this underdetermined problem effectively. We exploit the second-order statistics of observations and introduce a novel BSS method, termed as underdetermined joint blind source separation (UJBSS). Considering the dependence information between two datasets, the problem of jointly estimating the mixing matrices is tackled via canonical polyadic (CP) decomposition of a specialized tensor in which a set of spatial covariance matrices are stacked. Furthermore, the estimated mixing matrices are used to recover the sources from each dataset separately. Numerical results demonstrate the competitive performance of the proposed method when compared to a commonly used JBSS method, multiset canonical correlation analysis (MCCA), and the single-set UBSS method, UBSS with free active sources (UBSS-FAS).

System-level design for hybrid systems is complex and error-prone. To ensure correctness, formal methods are usually considered, and have been successfully applied in practice. Refinement for discrete systems is well-known, while little work has been done for hybrid systems. In this paper, we first present an envelope semantics for hybrid systems, where control and physical devices are separately described. Then, we relate the semantics to hybrid CSP (a well-known compositional modelling language for hybrid systems) by a Galois connection, to show its reasonableness. Based on this, we define a set of refinement rules that refine an abstract specification to a lower-level implementation. In the end, several examples are provided to show our methodology. Moreover, in our methodology classical refinement calculus is reused, and the soundness is provided by a monotonicity law.

This paper presents a 6thorder, 700-1100 MHz, 3.6-Gb/s sampling continuous-time band-pass sigma-delta (CT BP ΣΔ) ADC realized in 65 nm CMOS technology. A high linearity transconductance-stage with Miller effect cancellation is proposed to provide above 30 dBm IIP3 over PVT corners. A 4-bit quantizer and non-return to zero (NRZ) feedback DACs are engaged in this design. The post-layout simulation shows a maximum 67.2 dB two-tone SFDR in 1-MHz bandwidth, IIP3 and noise figure are 4.3 dBm and 17.3 dB, respectively.

Simulink is an industrial de-facto standard for building executable models of embedded systems and their environments, facilitating validation by simulation. Due to the inherent incompleteness of this form of system validation, complementing simulation by formal verification would be desirable. A prerequisite for such an approach is a formal semantics of Simulink's graphical models. In this paper, we show how to encode Simulink diagrams into Hybrid CSP (HCSP), a formal modelling language encoding hybrid system dynamics by means of an extension of CSP. The translation from Simulink to HCSP is fully automatic. We furthermore discuss how to utilize a Hybrid Hoare Logic Prover to verify the translated HCSP models. We demonstrate our approach on a combined scenario originating from the Chinese High-speed Train Control System at Level 3 (CTCS-3).

BACKGROUND: Dynamic protein phosphorylation is an essential regulatory mechanism in various organisms. In this capacity, it is involved in a multitude of signal transduction pathways. Kinase-specific phosphorylation data lay the foundation for reconstruction of signal transduction networks. For this reason, precise annotation of phosphorylated proteins is the first step toward simulating cell signaling pathways. However, the vast majority of kinase-specific phosphorylation data remain undiscovered and existing experimental methods and computational phosphorylation site (P-site) prediction tools have various limitations with respect to addressing this problem. RESULTS: To address this issue, a novel protein kinase identification web server, PKIS, is here presented for the identification of the protein kinases responsible for experimentally verified P-sites at high specificity, which incorporates the composition of monomer spectrum (CMS) encoding strategy and support vector machines (SVMs). Compared to widely used P-site prediction tools including KinasePhos 2.0, Musite, and GPS2.1, PKIS largely outperformed these tools in identifying protein kinases associated with known P-sites. In addition, PKIS was used on all the P-sites in Phospho.ELM that currently lack kinase information. It successfully identified 14 potential SYK substrates with 36 known P-sites. Further literature search showed that 5 of them were indeed phosphorylated by SYK. Finally, an enrichment analysis was performed and 6 significant SYK-related signal pathways were identified. CONCLUSIONS: In general, PKIS can identify protein kinases for experimental phosphorylation sites efficiently. It is a valuable bioinformatics tool suitable for the study of protein phosphorylation. The PKIS web server is freely available at http://bioinformatics.ustc.edu.cn/pkis.

In this paper, two new approaches to the digital compensation of excess loop delay in continuous-time Delta-Sigma modulators are presented. They are based on a shifting of the transfer characteristic of a scaled flash ADC used for the implementation of the quantizer. The first approach considers an adaptation of the reference voltage of the comparators while the second approach focuses on the implementation of additional comparators. Both approaches are verified by means of simulations performed on a Verilog-A model of a third-order continuous-time Delta-Sigma modulator while replacing the corresponding quantizers by means of transistor-level implementations.