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Samuel Ho

dblp:16/7026 · DBLP profile ↗
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2ranked-venue papers
2as first author
0since 2021 · last 1990
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 67% Performance modeling and evaluation · 33%

Topics — the 2 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture
instruction set architecture
0.011990
Balance in Architectural Design · ISCA 1990
Processor architecture and microarchitecture › instruction set architecture › instruction set style
RISC vs CISC
0.011990
Balance in Architectural Design · ISCA 1990
YearPublicationVenuePosition
1990 A Formal Model of the Processor Memory Interface
Samuel Ho, Lawrence Snyder 0001
ICPP (1)1
1990 Balance in Architectural Design
abstract
We introduce a performance metric, normalized time, which is closely related to such measures as the area-time product of VLSI theory and the price / performance ratio of advertising literature. This metric captures the idea of a piece of hardware “pulling its own weight,” i.e. contributing as much to performance as it costs in resources. We then prove general theorems for stating when the size of a given part is in balance with its utilization, and give specific formulas for commonly found linear and quadratic devices. We also apply these formulas to an analysis of a specific processor element, and discuss the implications for bit-serial vs word-parallel, RISC vs CISC, and VLIW designs.
Samuel Ho, Lawrence Snyder 0001
ISCA1