In this paper, a novel built-in tuning technique to compensate for process variability-induced imperfections in RF circuits is proposed. The yield improvement methodology proposed is a generic and self-contained tuning method that does not require a digital signal processor as in prior software-based methods or the use of a tester. The technique uses digital logic that can be synthesized on-chip along with the analog/RF tuning circuitry to performing self-tuning. An optimized digital bitstream (stimulus) is used to stimulate the RF device, and the response of the device is downconverted to the low-frequency domain using a sensor. The resulting signal is mapped to a digital signature, in such a way that the Hamming distance between the observed and the reference signatures represents the degree by which the device specifications differ from the nominal specifications. A logic-driven algorithm is used to minimize this Hamming distance to optimize multiple RF specifications concurrently. The presented methodology incurs minimal area overhead, and the tuning time is in the order of milliseconds. Results obtained by tuning the power amplifier of a 2.4-GHz transmitter show up to 16% yield improvement. To validate the proposed yield improvement concept on hardware, results obtained from experimentation on an industrial transmitter are presented.

Modern radio front ends are required to operate over diverse channel conditions requiring the incorporation of significant performance overheads into their design. This results in significantly higher power consumption over most of the operational period since the worst case channels are not statistically prevalent. Adaptive systems solve this problem by adapting the performance and power consumption depending on channel conditions. In this paper, it is demonstrated that depending upon the throughput requirements of the system multiple low-power adaptation modes can be designed. These modes ensure either highest throughput operation or lowest energy-per-bit operation. The operation of these modes is demonstrated in simulation using multiple-input-multiple-output (MIMO) receiver and transmitter front ends. Subsequently, the concepts are demonstrated in hardware for both MIMO and single-input-single-output front ends.

This paper presents a process-variation tolerant, continuously channel-adaptive wireless front-end architecture and related adaptation algorithms to allow a radio-frequency transceiver to function with minimum power at all channel conditions and manufacturing process corner. Current wireless transceiver front-ends are designed for worst case channel conditions and a limited degree of post manufacture tuning is performed to compensate for process variations. It is shown how the proposed architecture can result in significant power savings over current practice without compromising system-level bit-error rate (while keeping the end-user experience unaffected). In contrast to traditional wireless circuits with limited tunability, such a zero-margin design is achieved by close loop adaptation of the wireless front-end circuits to ensure that they only consume the minimum power and deliver just enough performance (and not any more) for any channel condition. The adaptation methodology is applied to a WLAN receiver design and hardware measurement data for an adaptive receiver is presented showing a > 3 × power improvement under best case channel conditions.

Modern MIMO RF transceiver systems are designed to operate reliably under diverse channel conditions leading to incorporation of significant performance margins in RF transceiver systems. In general, across dynamically varying channel conditions, the fidelity of the RF front end devices can be traded-off against power consumption without compromising system-level BER limits. In this work such a real-time performance vs. power consumption modulation of RF front-end devices in MIMO systems is demonstrated. Through a multi-dimensional optimization technique, power-optimal configuration of the front-end for varying channel conditions are created. Additionally multiple low-power operating modes for the MIMO system are proposed depending on the performance metric (data rate or energy-per-bit) that need to be optimized for different applications.

A low cost methodology for simultaneous testing and tuning of multiple chains of MIMO-OFDM wireless transmitter for system-level specifications is presented. Bandwidth-partitioned test stimuli enable the determination of the behavioral characteristics of the different chains of the RF transmitter using a one-time data acquisition. The determined behavioral characteristics of the transmitters are then correlated to system-level specifications in the simulation environment. Using the test setup, a power conscious system-level tuning approach for yield improvement is developed for tuning of parametric deviations. A yield improvement of 20% is obtained using the proposed methodology. Finally, an adaptive tuning approach is presented for those devices that face increased reliability risks/power-budget violations due to the excessive power consumption caused by post-manufacturing tuning. The tuning methodology achieves new performance metrics for these devices that attempt to maximize the conditions under which the device operates. Significant improvement in yield is obtained using the adaptive tuning methodology. Preliminary hardware validation of the proposed methodology using off the shelf components is performed.

Testing of adaptive analog/RF systems is challenging as any test procedure must ensure that the system adapts correctly to external perturbations (process, workload) without incurring the excessive test time associated with iterative tuning procedures. This problem is made worse by the increased number of adaptation settings (“tuning knob values”) and the requirement of measuring specifications at all of these settings. In this paper, a new test technique is proposed that allows the closed loop performance of the adaptation procedure to be predicted from a set of open-loop tests. The optimal knob settings where the system should be tested in open-loop are found using a gradient based search algorithm and optimized test signals are generated such that the error in performance prediction across different tuning knob settings is minimized. The results of these tests are then mapped to the performance of the adaptive system which is validated implicitly without incurring large testing and tuning costs. Simulation results and hardware measurement results prove the validity of the proposed technique.

Due to the use of scaled technologies, high levels of integration and high speeds of today's mixed-signal SoCs, the problem of validating correct operation of the SoC under electrical bugs and that of debugging yield loss due to unmodeled multi-dimensional variability effects is extremely challenging. Precise simulation of all electrical aspects of the design including the interfaces between digital and analog circuitry, coupling across power and ground planes, crosstalk, etc., across all process corners is very hard to achieve in a practical sense. The problem is expected to get worse as analog/mixed-signal/RF devices scale beyond the 45nm node and are more tightly integrated with digital systems than at present. In this context, a post-silicon validation methodology for analog/mixed-signal/RF SoCs is proposed that relies on the use of special stimulus designed to expose differences between observed DUT behavior and its predictive model. The corresponding error signature is then used to identify the likely "type" of electrical bug and its location in the design using nonlinear optimization algorithms. Results of trial experiments on RF devices are presented.

This work develops a simple, practical yet easily realizable method for low cost measurement of phase and amplitude distortions in radio frequency power amplifiers (RF PA). Amplitude-to-amplitude (AM-AM) and amplitude-to-phase (AM-PM) distortions are two significant distortion effects in PAs at high output power levels, causing out of band interference in the transmitted signal and bit errors in the received signal. Traditional measurements of amplitude and phase distortion in RF PAs require the use of expensive vector network analyzers. In this work, we propose the use of phase-to-amplitude conversion to develop a low cost and accurate test methodology for AM-AM and AM-PM measurement using simple load board test circuitry along with software based difference generation and peak detection mechanisms. Using either simple sine wave stimulus with power sweep or a single amplitude modulated RF stimulus, both distortion effects can be measured with high accuracy for nominal devices as well as over process and voltage variations, while allowing significant reduction in test cost.

In this research, a new post-manufacture tuning approach for yield improvement of advanced RF systems is developed. The proposed method first determines module level performances from the system level response (signature) to an applied RF diagnostic test using top-down model diagnosis. Then a constrained optimizer is used to determine the best module level tuning parameter values that satisfy system level specifications (bottom-up analysis) based on the determined performances of the individual modules in a power-conscious manner. Both top-down and bottom-up analysis techniques are supported by hierarchical RF behavioral models. The health (effects of process variations) of individual modules affects the relationship between module level tuning parameters and module level performance metrics and is factored into the tuning procedure. A key benefit of the proposed approach is that only a single test application is needed. Simulation results and hardware data prove the efficiency of the proposed tuning technique.

Low cost diagnosis of RF systems has become an important problem due to increased process variability effects on the performance of RF devices and the need to ramp-up RF IC yield rapidly. In the recent past, there has been work on diagnosing RF device model parameters from random “frequency-rich” test stimulus. In this paper, we develop a novel test stimulus generation approach which produces a compact, deterministic test stimulus in such a way that the RF DUT model parameters can be computed directly from the DUT response (called the DUT signature). This is achieved through use of a non-linear solver that adjusts the DUT model parameters iteratively until the model response to the applied test matches the observed DUT test response signature. It is shown that a small set of optimized tones in the frequency domain or an optimized transient waveform in the time domain can be used as test stimulus. It is shown how the use of embedded sensors in the RF design can expedite model parameter diagnosis. The practicality and accuracy of the proposed diagnosis approach is shown through simulations and hardware measurements.

In this paper, a novel built-in tuning technique to compensate for variability induced imperfections in RF subsystems is proposed. The test stimulus is obtained from a filtered digital pattern and the RF response is down-converted using an envelope detector. The resulting signal is mapped to a digital signature, such that the Hamming Distance between the observed and the golden signature represents the degree by which the circuit specifications (Gain, IIP3, EVM, etc) differ from the ideal. A hardware driven algorithm is used to minimize this Hamming Distance to concurrently optimize (tune) multiple RF specifications. As opposed to prior research, the method does not require the use of an on-chip digital signal processor and uses minimal on-chip hardware. Results obtained on a 2.4 GHz transmitter subsystem show significant impact of tuning on device specifications.

Testing of RF circuits for gain, nonlinearity and distortion specification generally requires the use of multiple test measurements and long test times contributing to increased test cost. Prior RF test methods have suffered from significant test calibration effort (training for supervised learners) when using compact tests or from increased test time due to direct specification measurement. In this paper, a novel RF test methodology is developed that: (a) allows RF devices to be tested for amplitude and phase distortion in test time comparable to what can be achieved using supervised learning techniques while retaining the accuracy of direct specification measurement, (b) allows multiple RF specifications to be determined concurrently from a single data acquisition and (c) does not require any training for accurate test specification computation. The proposed method based on amplitude modulated RF stimulus driven RF distortion extraction is shown to give excellent results across common RF performance metrics (RMS error <;1.4%) while providing ~10× improvements in test time compared to previous methods.

In this paper, a novel methodology for continuous real time monitoring of the performance metrics of RF front end modules is proposed. The presented technique involves determination of the RF system parameters using time domain parameter estimation techniques with minimal hardware overhead. The computation of the behavioral parameters of the RF modules is performed at periodic intervals using real time signals through the use of a "parallel model" of the RF front end in the baseband DSP. During specific intervals corresponding to high signal power levels, parameter estimation of the RF front end is performed using a model in the baseband as a reference. The presented technique is used for detection/tracking of performance degradation in analog/RF front ends in real-time and does not require the use of supervised learning algorithms as with prior performance monitoring techniques. Simulation results showing accurate tracking of the distortion parameters of an RF transmitter used to demonstrate the core ideas of this research.

With technology scaling, the impact of intra and inter-die process variations on the performance of mixed-signal/RF circuits has increased, making process monitoring a critical task in the overall silicon manufacturing flow. We propose a novel process-specification cause-effect monitoring scheme that allows the effects of process variations and shifts on device specifications to be monitored on a per-IC basis as opposed to existing techniques that rely only on electrical test data gathered across lots of wafers. The method relies on the use of alternate diagnostic tests under which the DUT response (alternate diagnostic signature) exhibits strong simultaneous correlation with its specifications as well as the critical process or circuit parameters with virtually zero extra test-time or test-hardware cost. Simulation results indicate that critical process parameters can be diagnosed accurately from the applied tests.

In this paper, a holistic yield recovery approach based on post manufacture tuning of RF circuits and systems under large as well as small multi-parameter process variations is developed. Marginally failing devices (small parameter deviations) are tuned using a nonlinear ¿Augmented Lagrange¿ algorithm driven optimization engine that includes test specification values and power consumption in its optimization framework. A novel built-in alternate tuning test is used to explicitly evaluate all the DUT specifications at each optimization iteration. For large parameter deviations well beyond the test specification limits of the DUT, determination of the different specification values is difficult. Such devices are tuned using a golden response tuning approach which optimizes the DUT specifications implicitly until the DUT is ¿good enough¿ to be tuned by the prior Augmented Lagrange algorithm. The proposed methodology enables yield recovery of devices not possible with earlier methods, avoids local minima and can be implemented at low cost.

In this paper, a fast RF BIST-driven post-manufacture tuning methodology for yield improvement of RF transceiver systems is presented. The core algorithms optimize multiple transceiver performance metrics concurrently using a hardware-iterated gradient search algorithm that uses diagnostic BIST data to guide the tuning of circuit and software level parameters. Intelligent ¿initial guess¿ values for the circuit and software tuning knobs at the start of the tuning process allow rapid convergence. Power consumption is given key consideration through the tuning process. Further, self-tuning is performed with little or no external tester support. The viability of the proposed scheme has been demonstrated through an experimental RF hardware prototype. Experimental results demonstrate significant yield recovery while allowing up to 10X savings in test/tuning time.

The recent demand in wireless standards capable of providing short-range, high-speed data transfer has accelerated the growth of the Ultra-Wide Band (UWB) standard. MB-OFDM (Multi Band Orthogonal Frequency Division Multiplexing) UWB devices suffer from frequency dependent non-idealities due to extreme wideband operation (3.1 to 10.6 GHz). Further these characteristics are subjected to process variations when implemented in nanometer technologies. In this paper we propose two BIST assisted methodologies for estimation and compensation of these effects. The proposed solutions differ in hardware vs. software tradeoffs. The improvement in the linearity of the mixer over a set of process instances and the tradeoffs involved are presented to validate the proposed methodology.

Design and test of high-speed mixed-signal/RF circuits and systems is undergoing a transformation due to the effects of process variations stemming from the use of scaled CMOS technologies that result in significant yield loss. To this effect, post-manufacture tuning for yield recovery is now a necessity for many high-speed electronic circuits and systems and is typically driven by iterative test-and-tune procedures. Such procedures create new challenges for manufacturing test and built-in self-test of advanced mixed-signal/RF systems. In this paper, key test challenges are discussed and promising solutions are presented in the hope that it will be possible to design, manufacture and test ¿truly self-healing¿ systems in the near future.

Amplitude-to-amplitude (AM-AM) and amplitude-to-phase (AM-PM) distortion are two significant effects in power amplifiers at high output power levels. Traditional measurement of amplitude and phase distortion in RF power amplifiers requires the use of expensive vector network analyzers (VNAs). This paper proposes a low cost and accurate test methodology for AM-AM and AM-PM measurement using distortion-to-amplitude conversion using simple load board test circuitry along with the use of hardware and software based difference generation and peak detection mechanisms. It is seen that both distortion effects can be measured with high accuracy while allowing significant reduction in test cost.