EDBT 2026 Demo / reviewers in the wild / expert
Shunfen Li
dblp:160/0859
· DBLP profile ↗
3ranked-venue papers
0as first author
2since 2021 · last 2026
0000-0002-2464-1414ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 2 · 1 since 2021Systems, architecture and hardware · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems
lookup table |
1.0 | 1 | 2026 | Revisiting a classic form of memory-centric computing - lookup table · Sci. China Inf. Sci. 2026 |
Memory systems › processing-in-memory
memory-centric computing |
1.0 | 1 | 2026 | Revisiting a classic form of memory-centric computing - lookup table · Sci. China Inf. Sci. 2026 |
Memory systems
processing-in-memory |
1.0 | 1 | 2026 | Revisiting a classic form of memory-centric computing - lookup table · Sci. China Inf. Sci. 2026 |
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Revisiting a classic form of memory-centric computing - lookup table
Weibang Dai, XiaoGang Chen, Sannian Song, Houpeng Chen, Shunfen Li, Zhenhao Jiao, Zhitang Song |
Sci. China Inf. Sci. | 5 |
| 2026 | A PCM-based hybrid online learning architecture with adaptive threshold sign-based backpropagation and pulse-aware conductance control
Zhenhao Jiao, Shunfen Li, Weibang Dai, Chengcai Tu, Zhitang Song |
J. Syst. Archit. | 4 |
| 2018 | A novel non-volatile memory storage system for I/O-intensive applicationsabstractThe emerging memory technologies, such as phase change memory (PCM), provide chances for highperformance storage of I/O-intensive applications. However, traditional software stack and hardware architecture need to be optimized to enhance I/O efficiency. In addition, narrowing the distance between computation and storage reduces the number of I/O requests and has become a popular research direction. This paper presents a novel PCMbased storage system. It consists of the in-storage processing enabled file system (ISPFS) and the configurable parallel computation fabric in storage, which is called an in-storage processing (ISP) engine. On one hand, ISPFS takes full advantage of non-volatile memory (NVM)’s characteristics, and reduces software overhead and data copies to provide low-latency high-performance random access. On the other hand, ISPFS passes ISP instructions through a command file and invokes the ISP engine to deal with I/O-intensive tasks. Extensive experiments are performed on the prototype system. The results indicate that ISPFS achieves 2 to 10 times throughput compared to EXT4. Our ISP solution also reduces the number of I/O requests by 97% and is 19 times more efficient than software implementation for I/O-intensive applications. Wenbing Han, Shunfen Li, Gezi Li, Zhitang Song, Dagang Li 0001, Shiyan Chen |
Frontiers Inf. Technol. Electron. Eng. | 3 |