Demo Data from EDBT 2026 / reviewers in the wild / expert
Lizhong Zhang
dblp:160/4462
· DBLP profile ↗
10ranked-venue papers
2as first author
4since 2021 · last 2026
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 5 · 1 first-author · 2 since 2021Graphics, computer vision, multimedia, augmented reality and games · 4 · 1 first-author · 2 since 2021Systems, architecture and hardware · 2 · 1 since 2021Human-computer interaction and ubiquitous computing · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Artificial intelligence
1 paper |
Video understanding and tracking · 33% Vision and language · 33% Knowledge representation and reasoning · 33% | |
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Hardware reliability and fault tolerance · 67% Integrated circuit design · 33% |
Topics — the 7 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Knowledge, reasoning and agents › Knowledge representation and reasoning
neuro-symbolic reasoning |
1.0 | 1 | 2026 | Leveraging Static-Dynamic Scene Parsing to Enhance Progressive Symbolic Reasoning for Video Question Answering · IEEE Trans. Multim. 2026 |
Computer vision › Video understanding and tracking
video question answering |
1.0 | 1 | 2026 | Leveraging Static-Dynamic Scene Parsing to Enhance Progressive Symbolic Reasoning for Video Question Answering · IEEE Trans. Multim. 2026 |
Computer vision › Vision and language
visual reasoning |
1.0 | 1 | 2026 | Leveraging Static-Dynamic Scene Parsing to Enhance Progressive Symbolic Reasoning for Video Question Answering · IEEE Trans. Multim. 2026 |
Hardware reliability and fault tolerance › design for reliability
electrostatic discharge protection |
0.8 | 3 | 2019 | Improved turn-on behavior in a diode-triggered silicon-controlled rectifier for high-speed electrostatic discharge protection · Sci. China Inf. Sci. 2019 Design of a novel static-triggered power-rail ESD clamp circuit in a 65-nm CMOS process · Sci. China Inf. Sci. 2016 Investigation on the layout strategy of ggNMOS ESD protection devices for uniform conduction behavior and optimal width scaling · Sci. China Inf. Sci. 2015 |
Integrated circuit design
analog and mixed-signal circuits |
0.4 | 1 | 2019 | Improved turn-on behavior in a diode-triggered silicon-controlled rectifier for high-speed electrostatic discharge protection · Sci. China Inf. Sci. 2019 |
Integrated circuit design › semiconductor device fabrication
CMOS technology |
0.1 | 1 | 2016 | Design of a novel static-triggered power-rail ESD clamp circuit in a 65-nm CMOS process · Sci. China Inf. Sci. 2016 |
Hardware reliability and fault tolerance › reliability analysis
circuit reliability |
0.1 | 1 | 2015 | Investigation on the layout strategy of ggNMOS ESD protection devices for uniform conduction behavior and optimal width scaling · Sci. China Inf. Sci. 2015 |
Methods — techniques the papers use, named apart from their topics
symbolic reasoning machine · 1.0scene parser network · 1.0program execution · 1.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Leveraging Static-Dynamic Scene Parsing to Enhance Progressive Symbolic Reasoning for Video Question AnsweringabstractVideo question answering (VideoQA), a critical task in vision-language understanding and reasoning, encounters significant challenges in integrating visual concepts for compositional spatio-temporal reasoning, due to the inherent complexity of video data. Existing methods struggle to effectively capture both static and dynamic visual concepts and establish practical symbolic reasoning, which are essential for answering compositional questions. To address these challenges, we propose a neural-symbolic framework called Progressive Symbolic Reasoning based on Static-Dynamic Scene Parser Network (PSR-SDSP) for VideoQA tasks. PSR-SDSP features two key innovations: (1) the Scene Parser Network, which converts unstructured video data into static-dynamic symbolic representations, extracting structured representations of persons, objects, relationships, and action chronologies. (2) the Symbolic Reasoning Machine (SRM), which conducts top-down question decomposition and bottom-up compositional reasoning. Specifically, the SRM applies a program execution algorithm that integrates static-dynamic visual concepts with predicted programs to deduce the answers. Our results on AGQA Decomp show that PSR-SDSP outperforms existing models in compositional spatio-temporal reasoning. Experiments on the Novel Compositions and More Compositional Steps tasks highlight its potential generalization. Evaluations on datasets with varying degrees of domain differences, including STAR, ActivityNet-QA, and TVQA+, confirm PSR-SDSP's scalability. Guanglu Sun, Lili Liang, Jin Qiu, Lizhong Zhang, Fei Lang |
IEEE Trans. Multim. | 4 |
| 2024 | RetMIL: Retentive Multiple Instance Learning for Histopathological Whole Slide Image Classification
Hongbo Chu, Qiehe Sun, Jiawen Li 0005, Lizhong Zhang, Tian Guan, Anjia Han, Yonghong He |
MICCAI (4) | 5 |
| 2023 | Dynamic Tracking with Fuzzy Rules for Evolutionary Dynamic Constrained OptimizationabstractNature-inspired population-based stochastic search algorithms (SSA) have demonstrated effectiveness in solving many real-world dynamic optimization problems (DOPs), such as dynamic optimal power flow (DOPF) problems. The basic idea of solving DOPs using SSAs is to “track the moving optima”, rather than solving the changed problems from scratch. Its hidden assumption is that the problems are slightly changed in general, and it is expected that the search process can be accelerated by learning from past search experiences. However, the hidden assumption that the current search process can always benefit from previous search experiences might not be true for certain cases. For example, if the current problem is not similar to any of its previous problems, the historical solutions might not be helpful for the current search. To reduce such negative transfer, the following issues are worthy of study: how to choose which historical problems to learn from, and how to determine the degree of learning from historical problems. To solve the above problems, we propose a dynamic processing framework based on fuzzy rules from the perspective of incorporating human knowledge for optima tracking. The experimental results on the DOPF problems show that the SSA with the proposed optima tracking strategy outperforms other comparative algorithms. We open up the code and data of our algorithm44https://github.com/DMiC-Lab-HFUT/SMDE-Transfer. Chenyang Bu, Lizhong Zhang, Tao Zhu 0001, Wenjian Luo |
SMC | 3 |
| 2023 | MAT-transformer-based state forecasting method for information devices
Zhigang Chen 0001, Lizhong Zhang |
Future Gener. Comput. Syst. | 6 |
| 2019 | A New Method to Expand the Showing Range of a Virtual Reconstructed Image in Integral Imaging
Lizhong Zhang, Shigang Wang 0003, Wei Wu 0018, Tianshu Li |
ICIG (2) | 1 |
| 2019 | Improved turn-on behavior in a diode-triggered silicon-controlled rectifier for high-speed electrostatic discharge protection
Lizhong Zhang, Yuan Wang 0001, Yize Wang, Xing Zhang 0002, Yandong He |
Sci. China Inf. Sci. | 1 |
| 2018 | Investigation on the Gate Bias Voltage of BigFET in Power-rail ESD Clamp Circuit for Enhanced Transient Noise ImmunityabstractThis paper investigates the bigFET gate bias voltage in power-rail electrostatic discharge (ESD) clamp circuit for enhanced transient noise immunity. Based on a timed shutoff circuit, a resistor pair is employed to bias the bigFET gate voltage to different ratios of VDD. Through detailed investigations, an optimized bigFET gate bias scheme is proposed. With the optimized scheme, enhanced transient noise immunity of the investigated circuit is achieved. Besides, the optimized scheme can induce the channel and parasitic bipolar junction transistor parallel shunt paths in ESD events, which result in a lower on-resistance. Moreover, the optimized scheme is also validated in the high-threshold-voltage bigFET samples. Guangyi Lu, Yuan Wang 0001, Lizhong Zhang, Yize Wang, Ru Huang 0001, Xing Zhang 0002 |
ISCAS | 3 |
| 2017 | Sparse Acquisition Integral Imaging System
Shigang Wang 0003, Wei Wu 0018, Tianshu Li, Lizhong Zhang |
ICIG (3) | 5 |
| 2016 | Design of a novel static-triggered power-rail ESD clamp circuit in a 65-nm CMOS process
Guangyi Lu, Yuan Wang 0001, Lizhong Zhang, Jian Cao 0002, Xing Zhang 0002 |
Sci. China Inf. Sci. | 3 |
| 2015 | Investigation on the layout strategy of ggNMOS ESD protection devices for uniform conduction behavior and optimal width scaling
Guangyi Lu, Yuan Wang 0001, Lizhong Zhang, Jian Cao 0002, Song Jia, Xing Zhang 0002 |
Sci. China Inf. Sci. | 3 |