EDBT 2026 Demo / reviewers in the wild / expert
Venkata P. Yanambaka
dblp:161/2465 · also Prasanath Yanambaka, Prasanth Yanambaka, Venkata Prasanath Yanambaka, Venkata Prasanth Yanambaka
· DBLP profile ↗
5ranked-venue papers
1as first author
5since 2021 · last 2024
0000-0003-4625-8050ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 5 · 1 first-author · 5 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2024 | Fortified-Edge 4.0: A ML-Based Error Correction Framework for Secure Authentication in Collaborative Edge ComputingabstractPhysical Unclonable Functions (PUFs) are widely researched in the field of security because of their unique, robust, and reliable nature, PUFs are considered device-specific root keys that are hard to duplicate. There are many variants of PUFs that are being studied and implemented including hardware and software PUFs. Though PUFs are believed to be secure and reliable, they are not without challenges of their own. The efficient performance of PUF depends on various environmental factors, which leads to inefficiency. Bit flipping is one such problem that can bring down the reliability of the PUF. Memory-based PUFs are prone to unavoidable bit flips occurring in the hardware, similarly, sensor-based PUFs are prone to bit flips occurring due to temperature variation. The number of errors in the PUF response must be minimized to improve the reliability of the PUF in security applications. In this research we explore the Machine Learning (ML) model based on K-mer sequencing to detect and correct the bit flips in the PUFs, hence fortifying the PUF-based secure authentication system for authentication and authorization of Edge Data Centers (EDC) in a Collaborative Edge Computing (CEC) Environment. Seema G. Aarella, Venkata P. Yanambaka, Saraju P. Mohanty, Elias Kougianos |
ACM Great Lakes Symposium on VLSI | 2 |
| 2024 | PUFshield: A Hardware-Assisted Approach for Deepfake Mitigation Through PUF-Based Facial Feature AttestationabstractDeepfake has emerged as a threat to individual’s privacy and identity. It uses advanced deep learning algorithms to synthesize visual, text, and audio from multimedia content in a realistic way. The advancement of Deepfake techniques is posing a question on the integrity of the digital content on social media. This work presents a novel hardware assisted Deepfake mitigation approach through the device and content integrity verification. In this work, the potential of hardware security primitive Physical Unclonable Functions (PUF) for mitigation of visual Deepfakes has been explored. The proposed framework presents a novel PUF-based image attestation technique that uses human facial features to create a unique pseudo-identity. The proposed architecture maps facial key point coordinates of each person in an image to PUF and creates a unique PUF generated key thereby having a unique pseudo identity for each image. Experimental evaluation uses Dlib facial detection model for facial attribute extraction and uses Arbiter PUF for image attestation. Venkata K. V. V. Bathalapalli, Venkata P. Yanambaka, Saraju P. Mohanty, Elias Kougianos |
ACM Great Lakes Symposium on VLSI | 2 |
| 2024 | Security-by-Design For Smart ElectronicsabstractThis article asserts that Artificial Intelligence (AI) has been the focus of research in recent years, and the Internet of Things devices powered by AI are proven to perform better than general purpose, but has given rise to a new set of challenges in privacy and security. The authors agree that a potential solution to improve security is through Hardware Assisted Security (HAS). Venkata P. Yanambaka, Ayas Kanta Swain, Saswat Kumar Ram, Saraju P. Mohanty |
ACM Great Lakes Symposium on VLSI | 1 |
| 2024 | Fortified-Edge 5.0: Federated Learning for Secure and Reliable PUF in Authentication SystemsabstractPhysical Unclonable Functions (PUFs) are widely studied for the security of devices in the largely heterogenous Internet-of-Things ecosystem. The need for low-power and low-cost yet robust and reliable security systems is of prime importance in resource-constrained environments like smart villages. Using PUFs as a security primitive has the limitation of environmental effects that lead to bit flipping in the PUF response, the challenge in using PUFs is to overcome the bit errors without adding to the area overhead or computational overhead. This research proposes a novel bit error detection and correction algorithm implemented using Federated Learning (FL). The error detection and correction model uses the N-gram concept of Natural Language Processing (NLP). The FL model is implemented on Flower AI, the global model gets the locally trained model's parameters, updates itself, and shares the updated models with all the local models. At the edge, the use of FL for model training and updating enhances the efficiency of the authentication system that uses PUF Challenge-Response Pairs (CRPs), reduces the area overhead and power consumption, and improves the security of the PUF-based authentication system. Seema G. Aarella, Venkata P. Yanambaka, Saraju P. Mohanty, Elias Kougianos |
VLSI-SoC | 2 |
| 2024 | BlockShield: A TPM-Integrated Blockchain-Based Framework for Shielding Against DeepfakesabstractThe increasing threat to individual privacy and personalized digital content on social media posed by Deepfakes has highlighted the importance for a secure and reliable multimedia content integrity mechanism. In this paper a novel Blockchain driven hardware secure video attestation scheme, BlockShield is proposed for Deepfake mitigation. The proposed system includes a novel approach that ensures digital content traceability and privacy using Blockchain smart contracts and TPM's digital signature mechanism. The proposed work explores the scope of hardware-assisted security for Deepfake mitigation through a hardware TPM working together with Blockchain for enhanced digital media protection and sharing. The proposed work is experimentally validated and presented which validates the scope of hardware-assisted and blockchain integrated Deepfake mitigation framework. Venkata K. V. V. Bathalapalli, Aakarshan Kumar, Saraju P. Mohanty, Elias Kougianos, Venkata P. Yanambaka |
VLSI-SoC | 5 |