We present SuperSAGA, an agentic semi-automated formal verification framework that assists in generating, debugging, and refining SystemVerilog Assertions (SVA) from natural language specifications. Rather than relying on full manual workflows, SuperSAGA combines Large Language Models (LLMs) with Retrieval-Augmented Generation (RAG) to guide assertion development based on human-reviewed verification plans using an agentic workflow. The framework translates specifications into syntactically correct assertions, integrates feedback from formal verification tools, and supports iterative refinement using an orchestration of supervisor and subordinate agents. Evaluation on OpenTitan IP modules shows improved quantitative coverage over state of the art and reduced manual effort, demonstrating the potential of guided automation in simplifying the assertion generation process for hardware designers.

Real-time scheduling of multiple control tasks in a weakly hard setting is an emerging research direction, as it offers a more flexible and feasible environment for task scheduling. This is especially pertinent for resource-constrained embedded applications where tasks are allowed to miss a few deadlines for prudent sharing of computational resources. However, a control task missing its deadline could result in the system being unsafe or unstable. A significant amount of research efforts have been reported in the literature addressing the schedulability of control tasks while preserving the stability or safety. However, all of them focus on a stable schedule or a safe schedule, but not both the safety and stability aspects together. In this work, we ensure both control stability and control safety to generate a safe and stable schedule for a weakly hard task system. In particular, we gradually endorse stability, safety, and schedulability, where we first synthesize a weakly hard constraint that preserves the desired stability of each control task. Next, we correlate stability with control safety and establish some mathematical results that guarantee control safety for an unbounded time horizon, unlike the existing methods. Finally, by leveraging Satisfiability Modulo Theories (SMT) , we synthesize the schedule that ensures control stability and safety while minimizing the worst-case response time of all the tasks, in a time-efficient way. To our knowledge, this is the first work to address stability, safety, and schedulability together for weakly hard control task systems. We validate our method through extensive experiments using standard automotive benchmarks. In addition, we demonstrate the efficiency of the proposed method in comparison with some of the state-of-the-art techniques, as well as highlight its scalability, thereby establishing its applicability in real-world scenarios.

Real-time scheduling of control tasks in a weakly hard system, where the tasks can miss a few of their deadlines without impeding the system’s performance, is a riveting research direction nowadays. While analyzing the schedulability of control tasks in a weakly hard setting, it is pivotal to take into account both the control stability and the desired performance of the underlying system. Though a scanty amount of research efforts are reported in the literature, focusing on the control-scheduling co-design aspects, most of them are completely offline in nature, and hence, not applicable for obtaining dynamic scheduling decisions at runtime. More specifically, a polynomial-time online scheduler, handling both stability and control performance, is almost absent in the literature. To bridge this design gap, in this work, we propose P 2 SDS , a novel online scheduling approach that preserves stability and enhances control performance by synthesizing optimal control execution patterns (CEPs) for scheduling control tasks, while running in polynomial time. The synthesized CEPs respect stability-induced weakly hard constraints endorsing optimal control performances of the underlying systems. A rigorous set of simulation-based experiments over 15 standard benchmarks from the automotive domain is carried out to establish the efficacy and real-time applicability of the proposed method. A comparative analysis of P 2 SDS with respect to the state-of-the-art approaches reports around 99% improvement in running time at maximum; 88%, 9.042%, and 87.5% improvements in stability, control performance, and schedulability ratio, respectively.

In this paper, we address the problem of safety verification for Spiking Neural Networks (SNNs) with Spiking Rectified Linear Activation (SRLA). The SNNs are obtained by first training Artificial Neural Networks (ANNs) and then translating to SNN with subsequent hyperparameter tuning. We propose a solution which tunes the temporal window hyperparameter of the translated SNN to ensure both accuracy and compliance with the safe range specification that requires the SNN outputs to remain within a safe range. We demonstrate our approach with experiments on 5 benchmark neural controllers.

Modern cyber-physical systems (CPSs) employ an increasingly large number of software control loops to enhance their autonomous capabilities. Such large task sets and their dependencies may lead to deadline misses caused by platform-level timing uncertainties, resource contention, etc. To ensure the schedulability of the task set in the embedded platform in the presence of these uncertainties, there exist co-design techniques that assign task periodicities such that control costs are minimized. Another line of work exists that addresses the same platform schedulability issue by skipping a bounded number of control executions within a fixed number of control instances. Considering that control tasks are designed to perform robustly against delayed actuation (due to deadline misses, network packet drops etc.) a bounded number of control skips can be applied while ensuring certain performance margin. Our work combines these two control scheduling co-design disciplines and develops a strategy to adaptively employ control skips or update periodicities of the control tasks depending on their current performance requirements. For this we leverage a novel theory of automata-based control skip sequence generation while ensuring periodicity, safety and stability constraints. We demonstrate the effectiveness of this dynamic resource sharing approach in an automotive Hardware-in-loop setup with realistic control task set implementations.

In recent times, Bounded Model Checking (BMC) engines have gained wide prominence in formal verification. Different BMC engines exist, differing in their optimization, representations and solving mechanisms used to represent and navigate the underlying state transition of the given design to be verified. The objective of this article is to examine if combinations of BMC engines can help to combine their strengths. We propose an approach that can create a sequencing of BMC engines that can reach better depth in formal verification, as opposed to executing them alone for a specified time. Our approach uses machine learning, specifically, the Multi-Armed Bandit paradigm of reinforcement learning, to predict the best-performing BMC engine for a given unrolling depth of the underlying circuit design. We evaluate our approach on a set of benchmark designs from the Hardware Model Checking Competition (HWMCC) benchmarks and show that it outperforms the state-of-the-art BMC engines in terms of the depth reached or time taken to deduce a property violation. The synthesized BMC engine sequences reach better depths than HWMCC results and the state-of-the-art technique, super_deep, for more than 80% of the cases. It also outperforms single engine runs for more than 92% of the cases where a property violation is not found within a given time duration. For designs where property violations are found within the given time duration, the synthesized sequences found the property violation in a lesser time than HWMCC for all the designs and outperformed both super_deep and single engine runs for more than 87% of the designs.

Low-power edge devices equipped with Graphics Processing Units (GPUs) are a popular target platform for real-time scheduling of inference pipelines. Such application-architecture combinations are popular in Advanced Driver-assistance Systems for aiding in the real-time decision-making of automotive controllers. However, the real-time throughput sustainable by such inference pipelines is limited by resource constraints of the target edge devices. Modern GPUs, both in edge devices and workstation variants, support the facility of concurrent execution of computation kernels and data transfers using the primitive of streams , also allowing for the assignment of priority to these streams. This opens up the possibility of executing computation layers of inference pipelines within a multi-priority, multi-stream environment on the GPU. However, manually co-scheduling such applications while satisfying their throughput requirement and platform memory budget may require an unmanageable number of profiling runs. In this work, we propose a Deep Reinforcement Learning (DRL)-based method for deciding the start time of various operations in each pipeline layer while optimizing the latency of execution of inference pipelines as well as memory consumption. Experimental results demonstrate the promising efficacy of the proposed DRL approach in comparison with the baseline methods, particularly in terms of real-time performance enhancements, schedulability ratio, and memory savings. We have additionally assessed the effectiveness of the proposed DRL approach using a real-time traffic simulation tool IPG CarMaker.

Neural Network (NN)-based real-time inferencing tasks are often co-scheduled on GPGPU-style edge platforms. Existing works advocate using different NN parameters for the same detection task in different environments. However, realizing such approaches remains challenging, given accelerator devices’ limited on-chip memory capacity. As a solution, we propose a multi-pass, time- and space-aware scheduling infrastructure for embedded platforms with GPU accelerators. The framework manages the residency of NN parameters in the limited on-chip memory while simultaneously dispatching relevant compute operations. The mapping decisions for memory operations and compute operations to the underlying resources of the platform are first determined in an offline manner. For this, we proposed a constraint solver-assisted scheduler that optimizes for schedule makespan. This is followed by memory optimization passes, which take the memory budget into account and accordingly adjust the start times of memory and compute operations. Our approach reports a 74%–90% savings in peak memory utilization with 0%–33% deadline misses for schedules that suffer miss percentage in ranges of 25%–100% when run using existing methods.

This paper proposes a double Maximum Power Point Tracking (MPPT) algorithm for achieving maximum efficiency of a grid-tied phase-shifted dual-PV LLC converter using the Adaptive Neuro-Fuzzy Interface System (ANFIS). The algorithm can extract maximum power from Photovoltaic (PV) panels under various weather conditions and partial shading. This dual MPPT algorithm generates switching frequency and phase shift through ANFIS to regulate the power flow using both Frequency Shift Modulation (FSM) and phase-shift modulation (PSM) techniques simultaneously. Here the ANFIS model is developed using the LLC converter’s input-output data set for each PV panel to train the neural network while the fuzzy rules ensure the optimum output using different membership functions. The second controller on the grid side maintains the DC link voltage to a fixed level as well as ensures grid power injection with minimal harmonic distortion. Derivation of this dual-MPPT algorithm and verification of the proposed closed-loop system is presented in this paper.

A novel four-port LLC converter for renewable energy application is proposed in this paper. The converter interfaces two Photovoltaic (PV) panels and one battery on the primary side whereas load on the secondary side. This topology allows three energy ports to share a single resonant tank through a hybrid full-bridge structure. The battery port of this converter is bidirectional to balance the load demand and energy generation from the PVs. Two PVs and battery ports are regulated via phase-shift modulation (PSM) to harvest maximum power from the PVs and control the battery operation, whereas the load is regulated by the Switching Frequency Modulation (SFM) technique. All operating scenarios with their steady-state waveforms, analysis, and control scheme are discussed. Finally, a simulation study is carried out to validate the operation of the proposed topology.

In this paper, a Bidirectional DC-DC Converter (BDC) for the Electrical Vehicle (EV) application is proposed. The converter benefits the advantages of both switched-inductor and switched-capacitor converters. The proposed converter has wide voltage gain range, low voltage stress on the power switches, and common ground between the grounds of the input and output sides. In addition, synchronous rectification is utilized to achieve Zero Voltage Switching (ZVS) during turn on and turn off dead time, which enhance the efficiency of the converter. The operating principle of the converter, steady-state analysis, and all devices’ voltage and current stresses are derived. Finally, a 1 kW converter with constant high-voltage side (400V) and very low-voltage side (24V) has been designed and simulated.

This paper presents a control strategy for a novel three-port DC-DC-AC converter based on dual active bridge and interleaved boost topology connected to PV, battery, and grid. We use model predictive control (MPC) framework to provide control actions in both islanded and grid-connected mode of operation. The control objectives are output voltage regulation in islanded mode when converter power flows between port-1 and port-3, maximum power point tracking (MPPT) during operation between port-1 and port-2, and active and reactive power control while operating in grid-connected mode. The different power flow modes of the converter have been represented as discrete time state-space models and then, cost functions have been developed. Convex optimization of the cost functions provides optimal control inputs and thus, the objectives are fulfilled. The simulation performed in Matlab/Simulink validates the effectiveness of the developed control method using MPC for the novel three-port converter (TPC).

MOTIVATION: Bistability is one of the salient dynamical features in various all-or-none kinds of decision-making processes. The presence of bistability in a cell signalling network plays a key role in input-output (I/O) relation. Our study is aiming to capture and emphasize the role of motif structure influencing the I/O relation between two nodes in the context of bistability. Here, a model-based analysis is made to investigate the critical conditions responsible for the emergence of different bistable protein-protein interaction (PPI) motifs and their possible applications to find the potential drug-targets. RESULTS: The global sensitivity analysis is used to identify sensitive parameters and their role in maintaining the bistability. Additionally, the bistable switching through hysteresis is explored to develop an understanding of the underlying mechanisms involved in the cell signalling processes, when significant motifs exhibiting bistability have emerged. Further, we elaborate the application of the results by the implication of the emerged PPI motifs to identify potential drug-targets in three cancer networks, which is validated with existing databases. The influence of stochastic perturbations that could hinder desired functionality of any signalling networks is also described here. SUPPLEMENTARY INFORMATION: Supplementary data are available at Bioinformatics online.

The increasing demand for mapping diverse embedded features onto shared electronic control units has brought about novel ways to co-design control tasks and their schedules. These techniques replace traditional implementations of control with new methods, such as pattern-based scheduling of control tasks and adaptive sharing of bandwidth among control loops through orchestration of their execution patterns. In the current practice of control design, once the static execution schedule is prepared for control tasks, no further control-related optimization is attempted for improving the control performance. We introduce, for the first time, an algorithmic mechanism that re-engineers a recurrent control task by enforcing switching between multiple control laws, which are designed for compensating the non-uniform gaps between successive executions of the control task. We establish that such post-processing of control task schedules may potentially help in improving the combined control performance of the co-scheduled control loops that are executing on a shared platform.

In practice, safety-critical cyber-physical systems (CPS) are often implemented using high quality-of-service (QoS) resources to provide maximum performance in all scenarios. Such implementations are oblivious to the changing criticality levels of CPS based on their physical dynamics (e.g., steady or transient state). Considering that high-QoS resources are constrained for cost-sensitive CPS, such criticality-oblivious implementations are highly inefficient. Towards a tighter dimensioning of these resources, state-of-the-art approaches have considered multi-QoS resources and studied criticality-aware dynamic resource allocation along the lines of mixed-criticality systems. However, these approaches have high implementation overheads. Moreover, in safety-critical domains like automotive and avionics, certification of such dynamic policies is challenging and the implementation platforms typically do not support dynamic reconfiguration. To address these challenges, we present GoodSpread that uses a static scheduling strategy and offers the same performance guarantees while saving resources (more than 50 % in certain cases) compared to the existing dynamic schemes. The main idea here is to spread the high-QoS resources as uniformly as possible over time in order to accommodate the uncertainty of when the criticality level might change. Our proposed strategy studies the physical dynamics to determine the spread factor, i.e., how often the high-QoS resources need to be provisioned. We further propose an extensibility-driven optimization approach to obtain a static schedule that will accommodate future workloads on the remaining resources with maximum flexibility.

In many wireless control networks, sensor data and controller data are exchanged periodically, which requires periodic packet transmissions between the physical plant and the controller. As an alternative, event-triggered control paradigms imply that data is only exchanged when there are significant changes in the state of the plant, e.g., because of disturbances. This is the nature of many IoT scenarios and requires that a receiving device has to listen to the channel for incoming packets during all times. However, especially in mobile networks, in which all devices are battery-powered, continuous scanning would drain the battery quickly and hence, reception needs to be duty-cycled. When optimizing such duty-cycled operation, significant energy savings are possible using intelligent software-enabled communication scheduling. In this paper, we propose a wireless transmission scheme that supports loosely time-triggered control. When optimizing the scheduling of transmissions and reception windows in the communication protocol, our proposed scheme allows for energy-efficient communication without requiring strict clock-synchronization between the devices. We show that such a scheme is practical and can greatly reduce the energy consumption in event-triggered control applications.

Executing a set of control loops over a shared multi-hop (wireless) control network (MCN) requires careful co-scheduling of the control tasks and the routing of sensory/actuation messages over the MCN. In this work, we establish pattern guided aperiodic execution of control loops as a resource-aware alternative to traditional fully periodic executions of a set of embedded control loops sharing a computation and the communication infrastructure. We provide a satisfiability modulo theory–based co-design framework that synthesizes loop execution patterns having optimized control cost as the underlying scheduling scheme together with the associated routing solution over the MCN. The routing solution implements the timed movement of the sensory/actuation messages of the control loops, generated according to those loop execution patterns. From the given settling time requirement of the control loops, we compute a control theoretically sound model using matrix inequalities, which gives an upper bound to the number of loop drops within the finite length loop execution pattern. Next, we show how the proposed framework can be useful for evaluating the fault tolerance of a resource-constrained shared MCN subject to communication link failure.

Software implementation of multiple embedded control loops often share compute resources. The control performance of such implementations have been shown to improve if the sharing of bandwidth between control loops can be dynamically regulated in response to input disturbances. In the absence of a structured methodology for planning such measures, the scheduler may spend too much time in deciding the optimal scheduling pattern. Our work leverages well known results in the domain of network control systems and applies them in the context of bandwidth sharing among controllers. We provide techniques that may be used a priori for computing co-schedulable execution patterns for a given set of control loops such that stability is guaranteed under all possible disturbance scenarios. Additionally, the design of the control loops optimize the average case control performance by adaptive sharing of bandwidth under time varying input disturbances.