Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Spencer Clites

dblp:161/9599 · DBLP profile ↗
← Back
2ranked-venue papers
0as first author
0since 2021 · last 2015
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Integrated circuit design · 50% Reconfigurable computing and FPGAs · 38% Energy-efficient computing · 12%
Computer networks
2 papers
Internet of things and sensor networks · 100%

Topics — the 3 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › analog and mixed-signal circuits › analog VLSI
field programmable analog array
0.212015
RAMP: accelerating wireless sensor hardware design with a reconfigurable analog/mixed-signal platform · IPSN 2015
Energy-efficient computing › low-power design
low-power sensing
0.112015
RAMP: accelerating wireless sensor hardware design with a reconfigurable analog/mixed-signal platform · IPSN 2015
Integrated circuit design › analog and mixed-signal circuits
mixed-signal circuit design
0.112015
RAMP: accelerating wireless sensor hardware design with a reconfigurable analog/mixed-signal platform · IPSN 2015

Methods — techniques the papers use, named apart from their topics

reconfigurable integrated circuit · 0.4mixed-signal design · 0.4analog signal processing · 0.4
YearPublicationVenuePosition
2015 RAMP: accelerating wireless sensor hardware design with a reconfigurable analog/mixed-signal platform
abstract
To meet the demanding requirements in the growing area of wireless sensing applications, some sensing platforms have included low-power application-specific hardware to process the sensor data for compression and pre-classification of the relevant information. While this additional hardware can reduce the overall power consumption of the system, a unique hardware solution is required for each application. To diminish this burden, we will demonstrate a reconfigurable analog/mixed-signal sensing platform. At the hardware-level, this platform consists of a reconfigurable integrated circuit containing many commonly used circuit components that can be connected in any configuration to perform sensor interfacing and ultra-low-power signal processing. At the software level, this platform provides a framework for abstracting the underlying hardware. We will demonstrate how our platform allows a developer to create applications ranging from standard sensor interfacing techniques to more complicated intelligent pre-processing and wake-up detection, without the necessity of circuit-level expertise.
Brandon M. Kelly, Brandon Rumberg, David W. Graham, Vinodkrishnan Kulathumani, Spencer Clites, Alex Dilello, Mir Mohammad Navidi
IPSN5
2015 RAMP: accelerating wireless sensor hardware design with a reconfigurable analog/mixed-signal platform
abstract
The requirements of many wireless sensing applications approach, or even exceed, the limited hardware capabilities of energy-constrained sensing platforms. To achieve such demanding requirements, some sensing platforms have included low-power application-specific hardware---at the expense of generality---to pre-process the sensor data for reduction to only the relevant information. While this additional hardware can save power by reducing the activity of the microcontroller and radio, a unique hardware solution is required for each application, which presents an unrealistic burden in terms of design time, cost, and ease of integration. To diminish these burdens, we present a reconfigurable analog/mixed-signal sensing platform in this work. At the hardware-level, this platform consists of a reconfigurable integrated circuit containing many commonly used signal-processing blocks and circuit components that can be connected in any configuration. At the software level, this platform provides a framework for abstracting this underlying hardware. We demonstrate how to quickly develop new applications on this platform, ranging from standard sensor interfacing techniques to more complicated intelligent pre-processing and wake-up detection. We also demonstrate how to integrate this platform with commonly used wireless sensor nodes and embedded-system platforms.
Brandon Rumberg, David W. Graham, Spencer Clites, Brandon M. Kelly, Mir Mohammad Navidi, Alex Dilello, Vinodkrishnan Kulathumani
IPSN3