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Ahmed Khawaja

dblp:162/0850 · DBLP profile ↗
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3ranked-venue papers
2as first author
0since 2021 · last 2018
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Software engineering, systems software and programming languages · 2 · 1 first-authorSystems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Software engineering, system software, and programming languages
1 paper
Operating systems · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Reconfigurable computing and FPGAs · 100%

Topics — the 1 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Operating systems › resource management
resource sharing
0.312018
Sharing, Protection, and Compatibility for Reconfigurable Fabric with AmorphOS · OSDI 2018
YearPublicationVenuePosition
2018 Sharing, Protection, and Compatibility for Reconfigurable Fabric with AmorphOS
Ahmed Khawaja, Joshua Landgraf, Rohith Prakash, Michael Wei, Eric Schkufza, Christopher J. Rossbach
OSDI1
2017 Accelerating Java Streams With A Data AnalyticsHardware Accelerator
abstract
In this paper, we demonstrate how new technology from Oracle can be utilized to provide big data analytics acceleration in a streamlined fashion. Specifically, our approach leverages the acceleration capabilities of the Data Analytics Accelerator (DAX) unit provided by Oracle's T7/M7/S7 SPARC processors and the Java Stream API to seamlessly accelerate Java applications by up to 20X, while using drastically fewer resources.
Karthik Ganesan 0006, Ahmed Khawaja, Shrinivas Joshi, Michelle Szucs, Melina Demertzi, Yao-Min Chen
ICPE2
2014 Performance analysis of HPC applications with irregular tree data structures
abstract
Adaptive mesh refinement (AMR) numerical methods utilizing octree data structures are an important class of HPC applications, in particular the solution of partial differential equations. Much effort goes into the implementation of efficient versions of these types of programs, where the emphasis is often on increasing multi-node performance when utilizing GPUs and coprocessors. By contrast, our analysis aims to characterize these workloads on traditional CPUs, as we believe that single-threaded intra-node performance of critical kernels is still a key factor for achieving performance at scale. Especially irregular workloads such as AMR methods, however, exhibit severe underutilization on general purpose processors. In this paper, we analyze the single core performance of two state-of-the-art, highly scalable adaptive mesh refinement codes, one based on the Fast Multipole Method (FMM) and one based on the Finite Element Method (FEM), when running on a x86 CPU. We examined both scalar and vectorized implementations to identify performance bottlenecks. We demonstrate that vectorization can provide a significant benefit in achieving high performance. The greatest bottleneck to peak performance is the high fraction of non-floating point instructions in the kernels.
Ahmed Khawaja, Andreas Gerstlauer, Lizy Kurian John, Dhairya Malhotra, George Biros
ICPADS1