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Jhao-Yan Liu

dblp:163/3515 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 2016
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 89% Integrated circuit design · 11%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › physical design › placement › circuit placement
analog placement
0.522016
Layout-Dependent Effects-Aware Analytical Analog Placement · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2016
Layout-dependent-effects-aware analytical analog placement · DAC 2015
Electronic design automation
physical design
0.522016
Layout-Dependent Effects-Aware Analytical Analog Placement · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2016
Layout-dependent-effects-aware analytical analog placement · DAC 2015
Electronic design automation › physical design
placement
0.212016
Layout-Dependent Effects-Aware Analytical Analog Placement · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2016
Integrated circuit design
analog and mixed-signal circuits
0.112016
Layout-Dependent Effects-Aware Analytical Analog Placement · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2016
Integrated circuit design › variation-aware design
layout-dependent effects
0.112016
Layout-Dependent Effects-Aware Analytical Analog Placement · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2016

Methods — techniques the papers use, named apart from their topics

nonlinear modeling · 0.5analytical placement · 0.5
YearPublicationVenuePosition
2016 Layout-Dependent Effects-Aware Analytical Analog Placement
abstract
Layout-dependent effects (LDEs) have become a critical issue in modern analog and mixed-signal circuit designs. The three major sources of LDEs, well proximity, length of oxide diffusion, and oxide-to-oxide spacing, significantly affect the threshold voltage and mobility of devices in advanced technology nodes. In this paper, we propose the first work to consider the three major sources of LDEs during analog placement. We first transform the three LDE models into nonlinear analytical placement models. Then an LDE-aware analytical analog placement algorithm is presented to mitigate the influence of the LDEs while improving circuit performance. Experimental results show that our placement algorithm can effectively and efficiently reduce the LDE-induced variations and improve circuit performance.
Hung-Chih Ou, Kai-Han Tseng, Jhao-Yan Liu, I-Peng Wu, Yao-Wen Chang
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
2015 Layout-dependent-effects-aware analytical analog placement
abstract
Layout-dependent effects (LDEs) have become a critical issue in modern analog and mixed-signal circuit designs. The three major sources of LDEs, well proximity, length of oxide diffusion, and oxide-to-oxide spacing, significantly affect the threshold voltage and mobility of devices. In this paper, we propose the first work to consider the three major sources of LDEs during analog placement. We first transform the three LDE models into nonlinear analytical placement models. Then an LDE-aware analytical analog placement algorithm is presented to mitigate the influence of the LDEs while improving circuit performance. Experimental results show that our placement algorithm can effectively and efficiently reduce the LDE-induced variations and improve circuit performance.
Hung-Chih Ou, Kai-Han Tseng, Jhao-Yan Liu, I-Peng Wu, Yao-Wen Chang
DAC3